drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c
Extension
.c
Size
10751 bytes
Lines
360
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (alloc) {
			ret = nvkm_memory_new(device, gr->ctxbuf[i].init ?
					      NVKM_MEM_TARGET_INST : NVKM_MEM_TARGET_INST_SR_LOST,
					      gr->ctxbuf[i].size, 1 << gr->ctxbuf[i].page,
					      gr->ctxbuf[i].init, &pmem[i]);
			if (WARN_ON(ret))
				return ret;

			if (gr->ctxbuf[i].bufferId ==
					NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_PRIV_ACCESS_MAP)
				entry->bNonmapped = 1;
		} else {
			if (gr->ctxbuf[i].bufferId ==
				NV2080_CTRL_GPU_PROMOTE_CTX_BUFFER_ID_UNRESTRICTED_PRIV_ACCESS_MAP)
				continue;

			pmem[i] = nvkm_memory_ref(gr->ctxbuf_mem[i]);
		}

		if (!entry->bNonmapped) {
			struct gf100_vmm_map_v0 args = {
				.priv = 1,
				.ro   = gr->ctxbuf[i].ro,
			};

			mutex_lock(&vmm->mutex.vmm);
			ret = nvkm_vmm_get_locked(vmm, false, true, false, 0, gr->ctxbuf[i].align,
						  nvkm_memory_size(pmem[i]), &pvma[i]);
			mutex_unlock(&vmm->mutex.vmm);
			if (ret)
				return ret;

			ret = nvkm_memory_map(pmem[i], 0, vmm, pvma[i], &args, sizeof(args));
			if (ret)
				return ret;

			entry->gpuVirtAddr = pvma[i]->addr;
		}

		if (entry->bInitialize) {
			entry->gpuPhysAddr = nvkm_memory_addr(pmem[i]);
			entry->size = gr->ctxbuf[i].size;
			entry->physAttr = 4;
		}

		nvkm_debug(subdev,
			   "promote %02d: pa %016llx/%08x sz %016llx va %016llx init:%d nm:%d\n",
			   entry->bufferId, entry->gpuPhysAddr, entry->physAttr, entry->size,
			   entry->gpuVirtAddr, entry->bInitialize, entry->bNonmapped);

		ctrl->entryCount++;
	}

	return nvkm_gsp_rm_ctrl_wr(&vmm->rm.device.subdevice, ctrl);
}

int
r535_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *chan, const struct nvkm_oclass *oclass,
		 struct nvkm_object **pobject)
{
	struct r535_gr *gr = r535_gr(base);
	struct r535_gr_chan *grc;
	int ret;

	if (!(grc = kzalloc_obj(*grc)))
		return -ENOMEM;

	nvkm_object_ctor(&r535_gr_chan, oclass, &grc->object);
	grc->gr = gr;
	grc->vmm = nvkm_vmm_ref(chan->vmm);
	grc->chan = chan;
	*pobject = &grc->object;

	ret = r535_gr_promote_ctx(gr, false, grc->vmm, grc->mem, grc->vma, &chan->rm.object);
	if (ret)
		return ret;

	return 0;
}

u64
r535_gr_units(struct nvkm_gr *gr)
{
	struct nvkm_gsp *gsp = gr->engine.subdev.device->gsp;

	return (gsp->gr.tpcs << 8) | gsp->gr.gpcs;
}

void
r535_gr_get_ctxbuf_info(struct r535_gr *gr, int i,

Annotation

Implementation Notes