drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rpc.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rpc.h

Extension

.h

Size

543 bytes

Lines

19

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• rm.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __NVKM_RM_RPC_H__
#define __NVKM_RM_RPC_H__
#include "rm.h"

#define to_payload_hdr(p, header) \
	container_of((void *)p, typeof(*header), params)

int r535_gsp_rpc_poll(struct nvkm_gsp *, u32 fn);

struct nvfw_gsp_rpc *r535_gsp_msg_recv(struct nvkm_gsp *, int fn, u32 gsp_rpc_len);
int r535_gsp_msg_ntfy_add(struct nvkm_gsp *, u32 fn, nvkm_gsp_msg_ntfy_func, void *priv);

int r535_rpc_status_to_errno(uint32_t rpc_status);
#endif

Annotation

• Immediate include surface: `rm.h`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.