drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.c- Extension
.c- Size
- 7076 bytes
- Lines
- 279
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
auxch.hbus.h
Detected Declarations
struct anx9805_padstruct anx9805_busstruct anx9805_auxfunction anx9805_bus_xferfunction anx9805_bus_newfunction anx9805_aux_xferfunction anx9805_aux_lnk_ctlfunction anx9805_aux_newfunction anx9805_pad_new
Annotated Snippet
struct anx9805_pad {
struct nvkm_i2c_pad base;
struct nvkm_i2c_bus *bus;
u8 addr;
};
struct anx9805_bus {
struct nvkm_i2c_bus base;
struct anx9805_pad *pad;
u8 addr;
};
static int
anx9805_bus_xfer(struct nvkm_i2c_bus *base, struct i2c_msg *msgs, int num)
{
struct anx9805_bus *bus = anx9805_bus(base);
struct anx9805_pad *pad = bus->pad;
struct i2c_adapter *adap = &pad->bus->i2c;
struct i2c_msg *msg = msgs;
int ret = -ETIMEDOUT;
int i, j, cnt = num;
u8 seg = 0x00, off = 0x00, tmp;
tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x10;
nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x10);
nvkm_wri2cr(adap, pad->addr, 0x07, tmp);
nvkm_wri2cr(adap, bus->addr, 0x43, 0x05);
mdelay(5);
while (cnt--) {
if ( (msg->flags & I2C_M_RD) && msg->addr == 0x50) {
nvkm_wri2cr(adap, bus->addr, 0x40, msg->addr << 1);
nvkm_wri2cr(adap, bus->addr, 0x41, seg);
nvkm_wri2cr(adap, bus->addr, 0x42, off);
nvkm_wri2cr(adap, bus->addr, 0x44, msg->len);
nvkm_wri2cr(adap, bus->addr, 0x45, 0x00);
nvkm_wri2cr(adap, bus->addr, 0x43, 0x01);
for (i = 0; i < msg->len; i++) {
j = 0;
while (nvkm_rdi2cr(adap, bus->addr, 0x46) & 0x10) {
mdelay(5);
if (j++ == 32)
goto done;
}
msg->buf[i] = nvkm_rdi2cr(adap, bus->addr, 0x47);
}
} else
if (!(msg->flags & I2C_M_RD)) {
if (msg->addr == 0x50 && msg->len == 0x01) {
off = msg->buf[0];
} else
if (msg->addr == 0x30 && msg->len == 0x01) {
seg = msg->buf[0];
} else
goto done;
} else {
goto done;
}
msg++;
}
ret = num;
done:
nvkm_wri2cr(adap, bus->addr, 0x43, 0x00);
return ret;
}
static const struct nvkm_i2c_bus_func
anx9805_bus_func = {
.xfer = anx9805_bus_xfer,
};
static int
anx9805_bus_new(struct nvkm_i2c_pad *base, int id, u8 drive,
struct nvkm_i2c_bus **pbus)
{
struct anx9805_pad *pad = anx9805_pad(base);
struct anx9805_bus *bus;
int ret;
if (!(bus = kzalloc_obj(*bus)))
return -ENOMEM;
*pbus = &bus->base;
bus->pad = pad;
ret = nvkm_i2c_bus_ctor(&anx9805_bus_func, &pad->base, id, &bus->base);
if (ret)
return ret;
switch (pad->addr) {
Annotation
- Immediate include surface: `auxch.h`, `bus.h`.
- Detected declarations: `struct anx9805_pad`, `struct anx9805_bus`, `struct anx9805_aux`, `function anx9805_bus_xfer`, `function anx9805_bus_new`, `function anx9805_aux_xfer`, `function anx9805_aux_lnk_ctl`, `function anx9805_aux_new`, `function anx9805_pad_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.