drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c- Extension
.c- Size
- 3760 bytes
- Lines
- 138
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.h
Detected Declarations
function nv04_mc_device_disablefunction nv04_mc_device_enablefunction nv04_mc_device_enabledfunction nv04_mc_intr_rearmfunction nv04_mc_intr_unarmfunction nv04_mc_intr_pendingfunction nv04_mc_initfunction nv04_mc_new
Annotated Snippet
#include "priv.h"
const struct nvkm_mc_map
nv04_mc_reset[] = {
{ 0x00001000, NVKM_ENGINE_GR },
{ 0x00000100, NVKM_ENGINE_FIFO },
{}
};
static void
nv04_mc_device_disable(struct nvkm_mc *mc, u32 mask)
{
nvkm_mask(mc->subdev.device, 0x000200, mask, 0x00000000);
}
static void
nv04_mc_device_enable(struct nvkm_mc *mc, u32 mask)
{
struct nvkm_device *device = mc->subdev.device;
nvkm_mask(device, 0x000200, mask, mask);
nvkm_rd32(device, 0x000200);
}
static bool
nv04_mc_device_enabled(struct nvkm_mc *mc, u32 mask)
{
return (nvkm_rd32(mc->subdev.device, 0x000200) & mask) == mask;
}
const struct nvkm_mc_device_func
nv04_mc_device = {
.enabled = nv04_mc_device_enabled,
.enable = nv04_mc_device_enable,
.disable = nv04_mc_device_disable,
};
static const struct nvkm_intr_data
nv04_mc_intrs[] = {
{ NVKM_ENGINE_DISP , 0, 0, 0x01010000, true },
{ NVKM_ENGINE_GR , 0, 0, 0x00001000, true },
{ NVKM_ENGINE_FIFO , 0, 0, 0x00000100 },
{ NVKM_SUBDEV_BUS , 0, 0, 0x10000000, true },
{ NVKM_SUBDEV_TIMER, 0, 0, 0x00100000, true },
{}
};
void
nv04_mc_intr_rearm(struct nvkm_intr *intr)
{
struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
int leaf;
for (leaf = 0; leaf < intr->leaves; leaf++)
nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000001);
}
void
nv04_mc_intr_unarm(struct nvkm_intr *intr)
{
struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
int leaf;
for (leaf = 0; leaf < intr->leaves; leaf++)
nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000000);
nvkm_rd32(mc->subdev.device, 0x000140);
}
bool
nv04_mc_intr_pending(struct nvkm_intr *intr)
{
struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
bool pending = false;
int leaf;
for (leaf = 0; leaf < intr->leaves; leaf++) {
intr->stat[leaf] = nvkm_rd32(mc->subdev.device, 0x000100 + (leaf * 4));
if (intr->stat[leaf])
pending = true;
}
return pending;
}
const struct nvkm_intr_func
nv04_mc_intr = {
.pending = nv04_mc_intr_pending,
.unarm = nv04_mc_intr_unarm,
.rearm = nv04_mc_intr_rearm,
Annotation
- Immediate include surface: `priv.h`.
- Detected declarations: `function nv04_mc_device_disable`, `function nv04_mc_device_enable`, `function nv04_mc_device_enabled`, `function nv04_mc_intr_rearm`, `function nv04_mc_intr_unarm`, `function nv04_mc_intr_pending`, `function nv04_mc_init`, `function nv04_mc_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.