drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c- Extension
.c- Size
- 4440 bytes
- Lines
- 168
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.hcore/firmware.hsubdev/timer.h
Detected Declarations
function filesfunction nvkm_pmu_pgobfunction nvkm_pmu_recvfunction nvkm_pmu_sendfunction nvkm_pmu_intrfunction nvkm_pmu_finifunction nvkm_pmu_initfunction nvkm_pmu_dtorfunction nvkm_pmu_ctorfunction nvkm_pmu_new_
Annotated Snippet
#include "priv.h"
#include <core/firmware.h>
#include <subdev/timer.h>
bool
nvkm_pmu_fan_controlled(struct nvkm_device *device)
{
struct nvkm_pmu *pmu = device->pmu;
/* Internal PMU FW does not currently control fans in any way,
* allow SW control of fans instead.
*/
if (pmu && pmu->func->code.size)
return false;
/* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi
* and newer automatically control the fan speed, which would
* interfere with SW control.
*/
return (device->chipset >= 0xc0);
}
void
nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable)
{
if (pmu && pmu->func->pgob)
pmu->func->pgob(pmu, enable);
}
static void
nvkm_pmu_recv(struct work_struct *work)
{
struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work);
return pmu->func->recv(pmu);
}
int
nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2],
u32 process, u32 message, u32 data0, u32 data1)
{
if (!pmu || !pmu->func->send)
return -ENODEV;
return pmu->func->send(pmu, reply, process, message, data0, data1);
}
static void
nvkm_pmu_intr(struct nvkm_subdev *subdev)
{
struct nvkm_pmu *pmu = nvkm_pmu(subdev);
if (!pmu->func->intr)
return;
pmu->func->intr(pmu);
}
static int
nvkm_pmu_fini(struct nvkm_subdev *subdev, enum nvkm_suspend_state suspend)
{
struct nvkm_pmu *pmu = nvkm_pmu(subdev);
if (!subdev->use.enabled)
return 0;
if (pmu->func->fini)
pmu->func->fini(pmu);
return 0;
}
static int
nvkm_pmu_init(struct nvkm_subdev *subdev)
{
struct nvkm_pmu *pmu = nvkm_pmu(subdev);
if (!pmu->func->init)
return 0;
return pmu->func->init(pmu);
}
static void *
nvkm_pmu_dtor(struct nvkm_subdev *subdev)
{
struct nvkm_pmu *pmu = nvkm_pmu(subdev);
nvkm_falcon_msgq_del(&pmu->msgq);
nvkm_falcon_cmdq_del(&pmu->lpq);
nvkm_falcon_cmdq_del(&pmu->hpq);
nvkm_falcon_qmgr_del(&pmu->qmgr);
nvkm_falcon_dtor(&pmu->falcon);
mutex_destroy(&pmu->send.mutex);
Annotation
- Immediate include surface: `priv.h`, `core/firmware.h`, `subdev/timer.h`.
- Detected declarations: `function files`, `function nvkm_pmu_pgob`, `function nvkm_pmu_recv`, `function nvkm_pmu_send`, `function nvkm_pmu_intr`, `function nvkm_pmu_fini`, `function nvkm_pmu_init`, `function nvkm_pmu_dtor`, `function nvkm_pmu_ctor`, `function nvkm_pmu_new_`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.