drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc

Extension

.fuc

Size

11853 bytes

Lines

545

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: drivers/gpu

Status

atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifdef INCLUDE_PROC
proc_kern:
process(PROC_KERN, 0, 0)
proc_list_head:
#endif

#ifdef INCLUDE_DATA
proc_list_tail:
time_prev: .b32 0
time_next: .b32 0
#endif

/******************************************************************************
 * kernel code segment
 *****************************************************************************/
#ifdef INCLUDE_CODE
	bra #init

// read nv register
//
// $r15 - current
// $r14 - addr
// $r13 - data (return)
// $r0  - zero
rd32:
	nv_iowr(NV_PPWR_MMIO_ADDR, $r14)
	imm32($r13, NV_PPWR_MMIO_CTRL_OP_RD | NV_PPWR_MMIO_CTRL_TRIGGER)
	nv_iowr(NV_PPWR_MMIO_CTRL, $r13)
	rd32_wait:
		nv_iord($r13, NV_PPWR_MMIO_CTRL)
		and $r13 NV_PPWR_MMIO_CTRL_STATUS
		bra nz #rd32_wait
	nv_iord($r13, NV_PPWR_MMIO_DATA)
	ret

// write nv register
//
// $r15 - current
// $r14 - addr
// $r13 - data
// $r0  - zero
wr32:
	nv_iowr(NV_PPWR_MMIO_ADDR, $r14)
	nv_iowr(NV_PPWR_MMIO_DATA, $r13)
	imm32($r13, NV_PPWR_MMIO_CTRL_OP_WR | NV_PPWR_MMIO_CTRL_MASK_B32_0 | NV_PPWR_MMIO_CTRL_TRIGGER)

#ifdef NVKM_FALCON_MMIO_TRAP
	push $r13
	mov $r13 NV_PPWR_INTR_TRIGGER_USER1
	nv_iowr(NV_PPWR_INTR_TRIGGER, $r13)
	wr32_host:
		nv_iord($r13, NV_PPWR_INTR)
		and $r13 NV_PPWR_INTR_USER1
		bra nz #wr32_host
	pop $r13
#endif

	nv_iowr(NV_PPWR_MMIO_CTRL, $r13)
	wr32_wait:
		nv_iord($r13, NV_PPWR_MMIO_CTRL)
		and $r13 NV_PPWR_MMIO_CTRL_STATUS
		bra nz #wr32_wait
	ret

// busy-wait for a period of time
//
// $r15 - current
// $r14 - ns
// $r0  - zero
nsec:

Annotation

• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.