drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c- Extension
.c- Size
- 6178 bytes
- Lines
- 230
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.hsubdev/clk.hsubdev/timer.hsubdev/volt.h
Detected Declarations
struct gk20a_pmu_dvfs_datastruct gk20a_pmustruct gk20a_pmu_dvfs_dev_statusfunction gk20a_pmu_dvfs_targetfunction gk20a_pmu_dvfs_get_cur_statefunction gk20a_pmu_dvfs_get_target_statefunction gk20a_pmu_dvfs_get_dev_statusfunction gk20a_pmu_dvfs_reset_dev_statusfunction gk20a_pmu_dvfs_workfunction gk20a_pmu_finifunction gk20a_pmu_initfunction gk20a_pmu_new
Annotated Snippet
struct gk20a_pmu_dvfs_data {
int p_load_target;
int p_load_max;
int p_smooth;
unsigned int avg_load;
};
struct gk20a_pmu {
struct nvkm_pmu base;
struct nvkm_alarm alarm;
struct gk20a_pmu_dvfs_data *data;
};
struct gk20a_pmu_dvfs_dev_status {
u32 total;
u32 busy;
};
static int
gk20a_pmu_dvfs_target(struct gk20a_pmu *pmu, int *state)
{
struct nvkm_clk *clk = pmu->base.subdev.device->clk;
return nvkm_clk_astate(clk, *state, 0, false);
}
static void
gk20a_pmu_dvfs_get_cur_state(struct gk20a_pmu *pmu, int *state)
{
struct nvkm_clk *clk = pmu->base.subdev.device->clk;
*state = clk->pstate;
}
static int
gk20a_pmu_dvfs_get_target_state(struct gk20a_pmu *pmu,
int *state, int load)
{
struct gk20a_pmu_dvfs_data *data = pmu->data;
struct nvkm_clk *clk = pmu->base.subdev.device->clk;
int cur_level, level;
/* For GK20A, the performance level is directly mapped to pstate */
level = cur_level = clk->pstate;
if (load > data->p_load_max) {
level = min(clk->state_nr - 1, level + (clk->state_nr / 3));
} else {
level += ((load - data->p_load_target) * 10 /
data->p_load_target) / 2;
level = max(0, level);
level = min(clk->state_nr - 1, level);
}
nvkm_trace(&pmu->base.subdev, "cur level = %d, new level = %d\n",
cur_level, level);
*state = level;
return (level != cur_level);
}
static void
gk20a_pmu_dvfs_get_dev_status(struct gk20a_pmu *pmu,
struct gk20a_pmu_dvfs_dev_status *status)
{
struct nvkm_falcon *falcon = &pmu->base.falcon;
status->busy = nvkm_falcon_rd32(falcon, 0x508 + (BUSY_SLOT * 0x10));
status->total= nvkm_falcon_rd32(falcon, 0x508 + (CLK_SLOT * 0x10));
}
static void
gk20a_pmu_dvfs_reset_dev_status(struct gk20a_pmu *pmu)
{
struct nvkm_falcon *falcon = &pmu->base.falcon;
nvkm_falcon_wr32(falcon, 0x508 + (BUSY_SLOT * 0x10), 0x80000000);
nvkm_falcon_wr32(falcon, 0x508 + (CLK_SLOT * 0x10), 0x80000000);
}
static void
gk20a_pmu_dvfs_work(struct nvkm_alarm *alarm)
{
struct gk20a_pmu *pmu =
container_of(alarm, struct gk20a_pmu, alarm);
struct gk20a_pmu_dvfs_data *data = pmu->data;
struct gk20a_pmu_dvfs_dev_status status;
struct nvkm_subdev *subdev = &pmu->base.subdev;
struct nvkm_device *device = subdev->device;
Annotation
- Immediate include surface: `priv.h`, `subdev/clk.h`, `subdev/timer.h`, `subdev/volt.h`.
- Detected declarations: `struct gk20a_pmu_dvfs_data`, `struct gk20a_pmu`, `struct gk20a_pmu_dvfs_dev_status`, `function gk20a_pmu_dvfs_target`, `function gk20a_pmu_dvfs_get_cur_state`, `function gk20a_pmu_dvfs_get_target_state`, `function gk20a_pmu_dvfs_get_dev_status`, `function gk20a_pmu_dvfs_reset_dev_status`, `function gk20a_pmu_dvfs_work`, `function gk20a_pmu_fini`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.