drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c
Extension
.c
Size
7768 bytes
Lines
271
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (ret) {
			nvkm_error(&pmu->subdev, "error parsing init message: %d\n", ret);
			return;
		}

		pmu->initmsg_received = true;
	}

	nvkm_falcon_msgq_recv(pmu->msgq);
}

static void
gm20b_pmu_fini(struct nvkm_pmu *pmu)
{
	/*TODO: shutdown RTOS. */

	flush_work(&pmu->recv.work);
	nvkm_falcon_cmdq_fini(pmu->lpq);
	nvkm_falcon_cmdq_fini(pmu->hpq);

	reinit_completion(&pmu->wpr_ready);

	nvkm_falcon_put(&pmu->falcon, &pmu->subdev);
}

static int
gm20b_pmu_init(struct nvkm_pmu *pmu)
{
	struct nvkm_falcon *falcon = &pmu->falcon;
	struct nv_pmu_args args = { .secure_mode = true };
	u32 addr_args = falcon->data.limit - sizeof(args);
	int ret;

	ret = nvkm_falcon_get(&pmu->falcon, &pmu->subdev);
	if (ret)
		return ret;

	pmu->initmsg_received = false;

	nvkm_falcon_pio_wr(falcon, (u8 *)&args, 0, 0, DMEM, addr_args, sizeof(args), 0, false);
	nvkm_falcon_start(falcon);
	return 0;
}

const struct nvkm_pmu_func
gm20b_pmu = {
	.flcn = &gm200_pmu_flcn,
	.init = gm20b_pmu_init,
	.fini = gm20b_pmu_fini,
	.intr = gt215_pmu_intr,
	.recv = gm20b_pmu_recv,
	.initmsg = gm20b_pmu_initmsg,
	.reset = gf100_pmu_reset,
};

#if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
MODULE_FIRMWARE("nvidia/gm20b/pmu/desc.bin");
MODULE_FIRMWARE("nvidia/gm20b/pmu/image.bin");
MODULE_FIRMWARE("nvidia/gm20b/pmu/sig.bin");
#endif

int
gm20b_pmu_load(struct nvkm_pmu *pmu, int ver, const struct nvkm_pmu_fwif *fwif)
{
	return nvkm_acr_lsfw_load_sig_image_desc(&pmu->subdev, &pmu->falcon,
						 NVKM_ACR_LSF_PMU, "pmu/",
						 ver, fwif->acr);
}

static const struct nvkm_pmu_fwif
gm20b_pmu_fwif[] = {
	{  0, gm20b_pmu_load, &gm20b_pmu, &gm20b_pmu_acr },
	{ -1, gm200_pmu_nofw, &gm20b_pmu },
	{}
};

int
gm20b_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
	      struct nvkm_pmu **ppmu)
{
	return nvkm_pmu_new_(gm20b_pmu_fwif, device, type, inst, ppmu);
}

Annotation

Implementation Notes