drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c- Extension
.c- Size
- 2123 bytes
- Lines
- 59
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
core/device.hpriv.h
Detected Declarations
function gf100_clkgate_initfunction pack_for_each_init
Annotated Snippet
while (addr < next) {
nvkm_trace(&therm->subdev, "\t0x%06x = 0x%08x\n",
addr, init->data);
nvkm_wr32(device, addr, init->data);
addr += 8;
}
}
}
/*
* TODO: Fermi clockgating isn't understood fully yet, so we don't specify any
* clockgate functions to use
*/
Annotation
- Immediate include surface: `core/device.h`, `priv.h`.
- Detected declarations: `function gf100_clkgate_init`, `function pack_for_each_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.