drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.c- Extension
.c- Size
- 3573 bytes
- Lines
- 94
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.hgk20a.hcore/tegra.h
Detected Declarations
function gm20b_volt_new
Annotated Snippet
#include "priv.h"
#include "gk20a.h"
#include <core/tegra.h>
static const struct cvb_coef gm20b_cvb_coef[] = {
/* KHz, c0, c1, c2 */
/* 76800 */ { 1786666, -85625, 1632 },
/* 153600 */ { 1846729, -87525, 1632 },
/* 230400 */ { 1910480, -89425, 1632 },
/* 307200 */ { 1977920, -91325, 1632 },
/* 384000 */ { 2049049, -93215, 1632 },
/* 460800 */ { 2122872, -95095, 1632 },
/* 537600 */ { 2201331, -96985, 1632 },
/* 614400 */ { 2283479, -98885, 1632 },
/* 691200 */ { 2369315, -100785, 1632 },
/* 768000 */ { 2458841, -102685, 1632 },
/* 844800 */ { 2550821, -104555, 1632 },
/* 921600 */ { 2647676, -106455, 1632 },
};
static const struct cvb_coef gm20b_na_cvb_coef[] = {
/* KHz, c0, c1, c2, c3, c4, c5 */
/* 76800 */ { 814294, 8144, -940, 808, -21583, 226 },
/* 153600 */ { 856185, 8144, -940, 808, -21583, 226 },
/* 230400 */ { 898077, 8144, -940, 808, -21583, 226 },
/* 307200 */ { 939968, 8144, -940, 808, -21583, 226 },
/* 384000 */ { 981860, 8144, -940, 808, -21583, 226 },
/* 460800 */ { 1023751, 8144, -940, 808, -21583, 226 },
/* 537600 */ { 1065642, 8144, -940, 808, -21583, 226 },
/* 614400 */ { 1107534, 8144, -940, 808, -21583, 226 },
/* 691200 */ { 1149425, 8144, -940, 808, -21583, 226 },
/* 768000 */ { 1191317, 8144, -940, 808, -21583, 226 },
/* 844800 */ { 1233208, 8144, -940, 808, -21583, 226 },
/* 921600 */ { 1275100, 8144, -940, 808, -21583, 226 },
/* 998400 */ { 1316991, 8144, -940, 808, -21583, 226 },
};
static const u32 speedo_to_vmin[] = {
/* 0, 1, 2, 3, 4, */
950000, 840000, 818750, 840000, 810000,
};
int
gm20b_volt_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_volt **pvolt)
{
struct nvkm_device_tegra *tdev = device->func->tegra(device);
struct gk20a_volt *volt;
u32 vmin;
if (tdev->gpu_speedo_id >= ARRAY_SIZE(speedo_to_vmin)) {
nvdev_error(device, "unsupported speedo %d\n",
tdev->gpu_speedo_id);
return -EINVAL;
}
volt = kzalloc_obj(*volt);
if (!volt)
return -ENOMEM;
*pvolt = &volt->base;
vmin = speedo_to_vmin[tdev->gpu_speedo_id];
if (tdev->gpu_speedo_id >= 1)
return gk20a_volt_ctor(device, type, inst, gm20b_na_cvb_coef,
ARRAY_SIZE(gm20b_na_cvb_coef), vmin, volt);
else
return gk20a_volt_ctor(device, type, inst, gm20b_cvb_coef,
ARRAY_SIZE(gm20b_cvb_coef), vmin, volt);
}
Annotation
- Immediate include surface: `priv.h`, `gk20a.h`, `core/tegra.h`.
- Detected declarations: `function gm20b_volt_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.