drivers/gpu/drm/omapdrm/omap_drv.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/omapdrm/omap_drv.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/omapdrm/omap_drv.h- Extension
.h- Size
- 2633 bytes
- Lines
- 113
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/types.hlinux/workqueue.hdss/omapdss.hdss/dss.hdrm/drm_atomic.hdrm/drm_gem.hdrm/omap_drm.homap_crtc.homap_encoder.homap_fb.homap_gem.homap_irq.homap_plane.homap_overlay.h
Detected Declarations
struct omap_drm_usergartstruct omap_fbdevstruct omap_drm_pipelinestruct omap_global_statestruct omap_drm_private
Annotated Snippet
struct omap_drm_pipeline {
struct drm_crtc *crtc;
struct drm_encoder *encoder;
struct drm_connector *connector;
struct omap_dss_device *output;
unsigned int alias_id;
};
/*
* Global private object state for tracking resources that are shared across
* multiple kms objects (planes/crtcs/etc).
*/
#define to_omap_global_state(x) container_of(x, struct omap_global_state, base)
struct omap_global_state {
struct drm_private_state base;
/* global atomic state of assignment between overlays and planes */
struct drm_plane *hwoverlay_to_plane[8];
};
struct omap_drm_private {
struct drm_device *ddev;
struct device *dev;
u32 omaprev;
struct dss_device *dss;
struct dispc_device *dispc;
bool irq_enabled;
unsigned int num_pipes;
struct omap_drm_pipeline pipes[8];
struct omap_drm_pipeline *channels[8];
unsigned int num_planes;
struct drm_plane *planes[8];
unsigned int num_ovls;
struct omap_hw_overlay *overlays[8];
struct drm_private_obj glob_obj;
struct workqueue_struct *wq;
/* lock for obj_list below */
struct mutex list_lock;
/* list of GEM objects: */
struct list_head obj_list;
struct omap_drm_usergart *usergart;
bool has_dmm;
/* properties: */
struct drm_property *zorder_prop;
/* irq handling: */
spinlock_t wait_lock; /* protects the wait_list */
struct list_head wait_list; /* list of omap_irq_wait */
u32 irq_mask; /* enabled irqs in addition to wait_list */
/* memory bandwidth limit if it is needed on the platform */
unsigned int max_bandwidth;
struct omap_fbdev *fbdev;
};
void omap_debugfs_init(struct drm_minor *minor);
struct omap_global_state * __must_check omap_get_global_state(struct drm_atomic_commit *s);
struct omap_global_state *omap_get_existing_global_state(struct omap_drm_private *priv);
#endif /* __OMAPDRM_DRV_H__ */
Annotation
- Immediate include surface: `linux/module.h`, `linux/types.h`, `linux/workqueue.h`, `dss/omapdss.h`, `dss/dss.h`, `drm/drm_atomic.h`, `drm/drm_gem.h`, `drm/omap_drm.h`.
- Detected declarations: `struct omap_drm_usergart`, `struct omap_fbdev`, `struct omap_drm_pipeline`, `struct omap_global_state`, `struct omap_drm_private`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.