drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c
Extension
.c
Size
14466 bytes
Lines
440
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct panel_desc {
	const struct drm_display_mode *modes;
	unsigned long mode_flags;
	enum mipi_dsi_pixel_format format;
	int (*init)(struct boe_th101mb31ig002 *ctx);
	unsigned int lanes;
	bool lp11_before_reset;
	unsigned int vcioo_to_lp11_delay_ms;
	unsigned int lp11_to_reset_delay_ms;
	unsigned int backlight_off_to_display_off_delay_ms;
	unsigned int enter_sleep_to_reset_down_delay_ms;
	unsigned int power_off_delay_ms;
};

struct boe_th101mb31ig002 {
	struct drm_panel panel;

	struct mipi_dsi_device *dsi;

	const struct panel_desc *desc;

	struct regulator *power;
	struct gpio_desc *enable;
	struct gpio_desc *reset;

	enum drm_panel_orientation orientation;
};

static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx)
{
	gpiod_direction_output(ctx->reset, 0);
	usleep_range(10, 100);
	gpiod_direction_output(ctx->reset, 1);
	usleep_range(10, 100);
	gpiod_direction_output(ctx->reset, 0);
	usleep_range(5000, 6000);
}

static int boe_th101mb31ig002_enable(struct boe_th101mb31ig002 *ctx)
{
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xab, 0xba);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0xba, 0xab);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x10, 0x01, 0x47, 0xff);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x0c, 0x14, 0x04, 0x50, 0x50, 0x14);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x56, 0x53, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x33, 0x30, 0x04);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0xb0, 0x00, 0x00, 0x10, 0x00, 0x10,
					       0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00,
					       0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x7c, 0x65, 0x55, 0x49, 0x46, 0x36,
					       0x3b, 0x24, 0x3d, 0x3c, 0x3d, 0x5c, 0x4c,
					       0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7c,
					       0x65, 0x55, 0x49, 0x46, 0x36, 0x3b, 0x24,
					       0x3d, 0x3c, 0x3d, 0x5c, 0x4c, 0x55, 0x47,
					       0x46, 0x39, 0x26, 0x06);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0xff, 0x87, 0x12, 0x34, 0x44, 0x44,
					       0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0f,
					       0x00, 0x00, 0xc1);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x54, 0x94, 0x02, 0x85, 0x9f, 0x00,
					       0x7f, 0x00, 0x54, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11,
					       0x22, 0x20, 0x44, 0xff, 0x18, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x86, 0x46, 0x05, 0x05, 0x1c, 0x1c,
					       0x1d, 0x1d, 0x02, 0x1f, 0x1f, 0x1e, 0x1e,
					       0x0f, 0x0f, 0x0d, 0x0d, 0x13, 0x13, 0x11,
					       0x11, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x07, 0x07, 0x04, 0x04, 0x1c, 0x1c,
					       0x1d, 0x1d, 0x02, 0x1f, 0x1f, 0x1e, 0x1e,
					       0x0e, 0x0e, 0x0c, 0x0c, 0x12, 0x12, 0x10,
					       0x10, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc6, 0x2a, 0x2a);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0xcb, 0x43);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x0e, 0x4b, 0x4b, 0x20, 0x19, 0x6b,
					       0x06, 0xb3);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0xe3, 0x2b, 0x38, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd4, 0x00, 0x01, 0x00, 0x0e, 0x04, 0x44,
					       0x08, 0x10, 0x00, 0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x80, 0x01, 0xff, 0xff, 0xff, 0xff,
					       0xff, 0xff);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x12, 0x03, 0x20, 0x00, 0xff);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x00);

	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);

	mipi_dsi_msleep(&dsi_ctx, 120);

Annotation

Implementation Notes