drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c
Extension
.c
Size
6625 bytes
Lines
242
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct boe_tv101wum_ll2 {
	struct drm_panel panel;
	struct mipi_dsi_device *dsi;
	struct gpio_desc *reset_gpio;
	struct regulator_bulk_data *supplies;
};

static const struct regulator_bulk_data boe_tv101wum_ll2_supplies[] = {
	{ .supply = "vsp" },
	{ .supply = "vsn" },
};

static inline struct boe_tv101wum_ll2 *to_boe_tv101wum_ll2(struct drm_panel *panel)
{
	return container_of(panel, struct boe_tv101wum_ll2, panel);
}

static void boe_tv101wum_ll2_reset(struct boe_tv101wum_ll2 *ctx)
{
	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
	usleep_range(5000, 6000);
	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
	usleep_range(5000, 6000);
	gpiod_set_value_cansleep(ctx->reset_gpio, 0);

	msleep(120);
}

static int boe_tv101wum_ll2_on(struct boe_tv101wum_ll2 *ctx)
{
	struct mipi_dsi_device *dsi = ctx->dsi;
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };

	dsi->mode_flags |= MIPI_DSI_MODE_LPM;

	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);

	mipi_dsi_msleep(&dsi_ctx, 120);

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x0e);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0xff, 0x81, 0x68, 0x6c, 0x22,
				     0x6d, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x23);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x94, 0x2c, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x19);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa2, 0x38);

	mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x0c);
	mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0xfd);
	mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x00);

	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);

	mipi_dsi_msleep(&dsi_ctx, 20);

	return dsi_ctx.accum_err;
}

static void boe_tv101wum_ll2_off(struct boe_tv101wum_ll2 *ctx)
{
	struct mipi_dsi_device *dsi = ctx->dsi;
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };

	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;

	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);

	mipi_dsi_msleep(&dsi_ctx, 70);

	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);

	mipi_dsi_msleep(&dsi_ctx, 20);

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x5a);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x5a);

	mipi_dsi_msleep(&dsi_ctx, 150);
}

static int boe_tv101wum_ll2_prepare(struct drm_panel *panel)
{
	struct boe_tv101wum_ll2 *ctx = to_boe_tv101wum_ll2(panel);
	int ret;

	ret = regulator_bulk_enable(ARRAY_SIZE(boe_tv101wum_ll2_supplies),
				    ctx->supplies);
	if (ret < 0)
		return ret;

Annotation

Implementation Notes