drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c- Extension
.c- Size
- 72349 bytes
- Lines
- 1829
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/gpio/consumer.hlinux/module.hlinux/of.hlinux/regulator/consumer.hdrm/drm_connector.hdrm/drm_crtc.hdrm/drm_mipi_dsi.hdrm/drm_panel.hvideo/mipi_display.h
Detected Declarations
struct boe_panelstruct panel_descstruct boe_panelfunction nt36523_enable_reload_cmdsfunction boe_tv110c9m_initfunction inx_hj110iz_initfunction boe_initfunction auo_kd101n80_45na_initfunction auo_b101uan08_3_initfunction starry_qfh032011_53g_initfunction boe_panel_disablefunction boe_panel_unpreparefunction boe_panel_preparefunction boe_panel_enablefunction boe_panel_get_modesfunction boe_panel_get_orientationfunction boe_panel_addfunction boe_panel_probefunction boe_panel_remove
Annotated Snippet
struct panel_desc {
const struct drm_display_mode *modes;
unsigned int bpc;
/**
* @width_mm: width of the panel's active display area
* @height_mm: height of the panel's active display area
*/
struct {
unsigned int width_mm;
unsigned int height_mm;
} size;
unsigned long mode_flags;
enum mipi_dsi_pixel_format format;
int (*init)(struct boe_panel *boe);
unsigned int lanes;
bool discharge_on_disable;
bool lp11_before_reset;
};
struct boe_panel {
struct drm_panel base;
struct mipi_dsi_device *dsi;
const struct panel_desc *desc;
enum drm_panel_orientation orientation;
struct regulator *pp3300;
struct regulator *pp1800;
struct regulator *avee;
struct regulator *avdd;
struct gpio_desc *enable_gpio;
};
#define NT36523_DCS_SWITCH_PAGE 0xff
#define nt36523_switch_page(ctx, page) \
mipi_dsi_dcs_write_seq_multi(ctx, NT36523_DCS_SWITCH_PAGE, (page))
static void nt36523_enable_reload_cmds(struct mipi_dsi_multi_context *ctx)
{
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
}
static int boe_tv110c9m_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
nt36523_switch_page(&ctx, 0x20);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xd9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x78);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x5a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x63);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x91);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xe6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x96, 0xf0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0xa2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
0x03, 0xfd, 0x03, 0xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
0x03, 0xfd, 0x03, 0xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
0x03, 0xfd, 0x03, 0xff);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/gpio/consumer.h`, `linux/module.h`, `linux/of.h`, `linux/regulator/consumer.h`, `drm/drm_connector.h`, `drm/drm_crtc.h`, `drm/drm_mipi_dsi.h`.
- Detected declarations: `struct boe_panel`, `struct panel_desc`, `struct boe_panel`, `function nt36523_enable_reload_cmds`, `function boe_tv110c9m_init`, `function inx_hj110iz_init`, `function boe_init`, `function auo_kd101n80_45na_init`, `function auo_b101uan08_3_init`, `function starry_qfh032011_53g_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.