drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c
Extension
.c
Size
14610 bytes
Lines
702
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ltk500hd1829_cmd {
	char cmd;
	char data;
};

struct ltk500hd1829_desc {
	const struct drm_display_mode *mode;
	const struct ltk500hd1829_cmd *init;
	unsigned int num_init;
};

struct ltk500hd1829 {
	struct device *dev;
	struct drm_panel panel;
	struct gpio_desc *reset_gpio;
	struct regulator *vcc;
	struct regulator *iovcc;
	const struct ltk500hd1829_desc *panel_desc;
};

static const struct ltk500hd1829_cmd ltk101b4029w_init[] = {
	/* Page0 */
	{ 0xE0, 0x00 },
	/* PASSWORD */
	{ 0xE1, 0x93 },
	{ 0xE2, 0x65 },
	{ 0xE3, 0xF8 },
	{ 0x80, 0x03 }, /* 0X03:4-LANE; 0X02:3-LANE; 0X01:2-LANE */
	/* Page1 */
	{ 0xE0, 0x01 },
	/* Set VCOM */
	{ 0x00, 0x00 },
	{ 0x01, 0x6F },
	/* Set Gamma Power, VGMP,VGMN,VGSP,VGSN */
	{ 0x17, 0x00 },
	{ 0x18, 0xAF }, /* 4.3V */
	{ 0x19, 0x01 }, /* 0.3V */
	{ 0x1A, 0x00 },
	{ 0x1B, 0xAF }, /* 4.3V */
	{ 0x1C, 0x01 }, /* 0.3V */
	/* Set Gate Power */
	{ 0x1F, 0x3E }, /* VGH_R  = 15V */
	{ 0x20, 0x28 }, /* VGL_R  = -12V */
	{ 0x21, 0x28 }, /* VGL_R2 = -12V */
	{ 0x22, 0x7E },
	/* SETPANEL */
	{ 0x35, 0x26 },
	{ 0x37, 0x09 },
	/* SET RGBCYC */
	{ 0x38, 0x04 },
	{ 0x39, 0x00 },
	{ 0x3A, 0x01 },
	{ 0x3C, 0x7C },
	{ 0x3D, 0xFF },
	{ 0x3E, 0xFF },
	{ 0x3F, 0x7F },
	/* Set TCON */
	{ 0x40, 0x06 }, /* RSO = 800 RGB */
	{ 0x41, 0xA0 }, /* LN = 640->1280 line */
	{ 0x42, 0x81 },
	{ 0x43, 0x08 }, /* VFP = 8 */
	{ 0x44, 0x0B }, /* VBP = 12 */
	{ 0x45, 0x28 }, /* HBP = 40 */
	/* power voltage */
	{ 0x55, 0x0F }, /* DCDCM = 0001, JD PWR_IC */
	{ 0x57, 0x69 },
	{ 0x59, 0x0A }, /* VCL = -2.9V */
	{ 0x5A, 0x28 }, /* VGH = 15V */
	{ 0x5B, 0x14 }, /* VGL = -11V */
	/* Gamma */
	{ 0x5D, 0x7C },
	{ 0x5E, 0x65 },
	{ 0x5F, 0x55 },
	{ 0x60, 0x47 },
	{ 0x61, 0x43 },
	{ 0x62, 0x32 },
	{ 0x63, 0x34 },
	{ 0x64, 0x1C },
	{ 0x65, 0x33 },
	{ 0x66, 0x31 },
	{ 0x67, 0x30 },
	{ 0x68, 0x4E },
	{ 0x69, 0x3C },
	{ 0x6A, 0x44 },
	{ 0x6B, 0x35 },
	{ 0x6C, 0x31 },
	{ 0x6D, 0x23 },
	{ 0x6E, 0x11 },
	{ 0x6F, 0x00 },
	{ 0x70, 0x7C },

Annotation

Implementation Notes