drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c- Extension
.c- Size
- 14791 bytes
- Lines
- 521
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_mipi_dbi.hdrm/drm_mipi_dsi.hdrm/drm_modes.hdrm/drm_of.hdrm/drm_panel.hlinux/backlight.hlinux/delay.hlinux/gpio/consumer.hlinux/init.hlinux/kernel.hlinux/media-bus-format.hlinux/module.hlinux/of.hlinux/regulator/consumer.hlinux/spi/spi.hvideo/mipi_display.h
Detected Declarations
struct d53e6ea8966struct d53e6ea8966_panel_infostruct d53e6ea8966function ams495qa01_update_gammafunction ams495qa01_panel_initfunction d53e6ea8966_preparefunction d53e6ea8966_enablefunction d53e6ea8966_disablefunction d53e6ea8966_unpreparefunction d53e6ea8966_get_modesfunction ams495qa01_set_brightnessfunction ams495qa01_backlight_registerfunction d53e6ea8966_probefunction d53e6ea8966_remove
Annotated Snippet
struct d53e6ea8966_panel_info {
/** @display_modes: the supported display modes */
const struct drm_display_mode *display_modes;
/** @num_modes: the number of supported display modes */
unsigned int num_modes;
/** @width_mm: panel width in mm */
u16 width_mm;
/** @height_mm: panel height in mm */
u16 height_mm;
/** @bus_flags: drm bus flags for panel */
u32 bus_flags;
/** @panel_init_seq: panel specific init sequence */
void (*panel_init_seq)(struct d53e6ea8966 *db);
/** @backlight_register: panel backlight registration or NULL */
int (*backlight_register)(struct d53e6ea8966 *db);
};
struct d53e6ea8966 {
/** @dev: the container device */
struct device *dev;
/** @dbi: the DBI bus abstraction handle */
struct mipi_dbi dbi;
/** @panel: the DRM panel instance for this device */
struct drm_panel panel;
/** @reset: reset GPIO line */
struct gpio_desc *reset;
/** @enable: enable GPIO line */
struct gpio_desc *enable;
/** @reg_vdd: VDD supply regulator for panel logic */
struct regulator *reg_vdd;
/** @reg_elvdd: ELVDD supply regulator for panel display */
struct regulator *reg_elvdd;
/** @dsi_dev: DSI child device (panel) */
struct mipi_dsi_device *dsi_dev;
/** @bl_dev: pseudo-backlight device for oled panel */
struct backlight_device *bl_dev;
/** @panel_info: struct containing panel timing and info */
const struct d53e6ea8966_panel_info *panel_info;
};
#define NUM_GAMMA_LEVELS 16
#define GAMMA_TABLE_COUNT 23
#define MAX_BRIGHTNESS (NUM_GAMMA_LEVELS - 1)
#define MCS_ELVSS_ON 0xb1
#define MCS_TEMP_SWIRE 0xb2
#define MCS_PASSWORD_0 0xf0
#define MCS_PASSWORD_1 0xf1
#define MCS_ANALOG_PWR_CTL_0 0xf4
#define MCS_ANALOG_PWR_CTL_1 0xf5
#define MCS_GTCON_SET 0xf7
#define MCS_GATELESS_SIGNAL_SET 0xf8
#define MCS_SET_GAMMA 0xf9
static inline struct d53e6ea8966 *to_d53e6ea8966(struct drm_panel *panel)
{
return container_of(panel, struct d53e6ea8966, panel);
}
/* Table of gamma values provided in datasheet */
static u8 ams495qa01_gamma[NUM_GAMMA_LEVELS][GAMMA_TABLE_COUNT] = {
{0x01, 0x79, 0x78, 0x8d, 0xd9, 0xdf, 0xd5, 0xcb, 0xcf, 0xc5,
0xe5, 0xe0, 0xe4, 0xdc, 0xb8, 0xd4, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x7d, 0x7c, 0x92, 0xd7, 0xdd, 0xd2, 0xcb, 0xd0, 0xc6,
0xe5, 0xe1, 0xe3, 0xda, 0xbd, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x7f, 0x7e, 0x95, 0xd7, 0xde, 0xd2, 0xcb, 0xcf, 0xc5,
0xe5, 0xe3, 0xe3, 0xda, 0xbf, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x82, 0x81, 0x99, 0xd6, 0xdd, 0xd1, 0xca, 0xcf, 0xc3,
0xe4, 0xe3, 0xe3, 0xda, 0xc2, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x84, 0x83, 0x9b, 0xd7, 0xde, 0xd2, 0xc8, 0xce, 0xc2,
0xe4, 0xe3, 0xe2, 0xd9, 0xc3, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x87, 0x86, 0x9f, 0xd6, 0xdd, 0xd1, 0xc7, 0xce, 0xc1,
0xe4, 0xe3, 0xe2, 0xd9, 0xc6, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x89, 0x89, 0xa2, 0xd5, 0xdb, 0xcf, 0xc8, 0xcf, 0xc2,
0xe3, 0xe3, 0xe1, 0xd9, 0xc7, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x8b, 0x8b, 0xa5, 0xd5, 0xdb, 0xcf, 0xc7, 0xce, 0xc0,
0xe3, 0xe3, 0xe1, 0xd8, 0xc7, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x8d, 0x8d, 0xa7, 0xd5, 0xdb, 0xcf, 0xc6, 0xce, 0xc0,
0xe4, 0xe4, 0xe1, 0xd7, 0xc8, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
0x00, 0x2f},
{0x01, 0x8f, 0x8f, 0xaa, 0xd4, 0xdb, 0xce, 0xc6, 0xcd, 0xbf,
0xe3, 0xe3, 0xe1, 0xd7, 0xca, 0xd3, 0xfa, 0xed, 0xe6, 0x2f,
Annotation
- Immediate include surface: `drm/drm_mipi_dbi.h`, `drm/drm_mipi_dsi.h`, `drm/drm_modes.h`, `drm/drm_of.h`, `drm/drm_panel.h`, `linux/backlight.h`, `linux/delay.h`, `linux/gpio/consumer.h`.
- Detected declarations: `struct d53e6ea8966`, `struct d53e6ea8966_panel_info`, `struct d53e6ea8966`, `function ams495qa01_update_gamma`, `function ams495qa01_panel_init`, `function d53e6ea8966_prepare`, `function d53e6ea8966_enable`, `function d53e6ea8966_disable`, `function d53e6ea8966_unprepare`, `function d53e6ea8966_get_modes`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.