drivers/gpu/drm/panel/panel-newvision-nv3051d.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-newvision-nv3051d.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-newvision-nv3051d.c
Extension
.c
Size
18976 bytes
Lines
542
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct nv3051d_panel_info {
	const struct drm_display_mode *display_modes;
	unsigned int num_modes;
	u16 width_mm, height_mm;
	u32 bus_flags;
	u32 mode_flags;
};

struct panel_nv3051d {
	struct device *dev;
	struct drm_panel panel;
	struct gpio_desc *reset_gpio;
	const struct nv3051d_panel_info *panel_info;
	struct regulator *vdd;
};

static inline struct panel_nv3051d *panel_to_panelnv3051d(struct drm_panel *panel)
{
	return container_of(panel, struct panel_nv3051d, panel);
}

static int panel_nv3051d_init_sequence(struct panel_nv3051d *ctx)
{
	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
	struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi};

	/*
	 * Init sequence was supplied by device vendor with no
	 * documentation.
	 */

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x30);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x52);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE3, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x40);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x03);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x12);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x1E);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x52);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x57);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0xDF);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x9C);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0xA7);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x53);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x3C);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0xFE);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x00);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x91, 0x77);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x77);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA0, 0x55);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA1, 0x50);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA4, 0x9C);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA7, 0x02);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA8, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA9, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAA, 0xFC);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAB, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAC, 0x06);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAD, 0x06);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAE, 0x06);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAF, 0x03);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB0, 0x08);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB1, 0x26);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB2, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB3, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB4, 0x33);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB5, 0x08);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB6, 0x26);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB7, 0x08);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB8, 0x26);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x30);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x52);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x02);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB1, 0x0E);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD1, 0x0E);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB4, 0x29);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD4, 0x2B);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB2, 0x0C);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD2, 0x0A);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB3, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD3, 0x28);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB6, 0x11);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD6, 0x0D);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB7, 0x32);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xD7, 0x30);

Annotation

Implementation Notes