drivers/gpu/drm/panel/panel-novatek-nt36672e.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-novatek-nt36672e.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panel/panel-novatek-nt36672e.c- Extension
.c- Size
- 22086 bytes
- Lines
- 609
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/gpio/consumer.hlinux/module.hlinux/of.hlinux/regulator/consumer.hdrm/drm_mipi_dsi.hdrm/drm_modes.hdrm/drm_panel.hvideo/mipi_display.h
Detected Declarations
struct panel_descstruct nt36672e_panelfunction nt36672e_enable_reload_cmdsfunction nt36672e_1080x2408_60hz_initfunction nt36672e_power_onfunction nt36672e_power_offfunction nt36672e_onfunction nt36672e_offfunction nt36672e_panel_preparefunction nt36672e_panel_unpreparefunction nt36672e_panel_get_modesfunction nt36672e_panel_probefunction nt36672e_panel_remove
Annotated Snippet
struct panel_desc {
const struct drm_display_mode *display_mode;
u32 width_mm;
u32 height_mm;
unsigned long mode_flags;
enum mipi_dsi_pixel_format format;
unsigned int lanes;
const char *panel_name;
void (*init_sequence)(struct mipi_dsi_multi_context *ctx);
};
struct nt36672e_panel {
struct drm_panel panel;
struct mipi_dsi_device *dsi;
struct gpio_desc *reset_gpio;
struct regulator_bulk_data supplies[3];
const struct panel_desc *desc;
};
#define NT36672E_DCS_SWITCH_PAGE 0xff
#define nt36672e_switch_page(ctx, page) \
mipi_dsi_dcs_write_seq_multi(ctx, NT36672E_DCS_SWITCH_PAGE, (page))
static void nt36672e_enable_reload_cmds(struct mipi_dsi_multi_context *ctx)
{
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
}
static inline struct nt36672e_panel *to_nt36672e_panel(struct drm_panel *panel)
{
return container_of(panel, struct nt36672e_panel, panel);
}
static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
{
nt36672e_switch_page(ctx, 0x10);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xaa, 0x02,
0x0e, 0x00, 0x2b, 0x00, 0x07, 0x0d, 0xb7, 0x0c, 0xb7);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x1b, 0xa0);
nt36672e_switch_page(ctx, 0x20);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66);
mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x40);
mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x38);
mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x83);
mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x91);
mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0xd1);
mipi_dsi_dcs_write_seq_multi(ctx, 0x96, 0xd1);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf2, 0x64);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf3, 0x54);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf4, 0x64);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf5, 0x54);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf6, 0x64);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf7, 0x54);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf8, 0x64);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf9, 0x54);
nt36672e_switch_page(ctx, 0x24);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x0c);
mipi_dsi_dcs_write_seq_multi(ctx, 0x05, 0x1d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x2f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x09, 0x2e);
mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x2d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x0b, 0x2c);
mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0x17);
mipi_dsi_dcs_write_seq_multi(ctx, 0x12, 0x13);
mipi_dsi_dcs_write_seq_multi(ctx, 0x13, 0x15);
mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x14);
mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0x16);
mipi_dsi_dcs_write_seq_multi(ctx, 0x17, 0x18);
mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x01);
mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x1d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x2f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x2e);
mipi_dsi_dcs_write_seq_multi(ctx, 0x22, 0x2d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x23, 0x2c);
mipi_dsi_dcs_write_seq_multi(ctx, 0x29, 0x17);
mipi_dsi_dcs_write_seq_multi(ctx, 0x2a, 0x13);
mipi_dsi_dcs_write_seq_multi(ctx, 0x2b, 0x15);
mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x14);
mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x16);
mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x18);
mipi_dsi_dcs_write_seq_multi(ctx, 0x32, 0x04);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/gpio/consumer.h`, `linux/module.h`, `linux/of.h`, `linux/regulator/consumer.h`, `drm/drm_mipi_dsi.h`, `drm/drm_modes.h`, `drm/drm_panel.h`.
- Detected declarations: `struct panel_desc`, `struct nt36672e_panel`, `function nt36672e_enable_reload_cmds`, `function nt36672e_1080x2408_60hz_init`, `function nt36672e_power_on`, `function nt36672e_power_off`, `function nt36672e_on`, `function nt36672e_off`, `function nt36672e_panel_prepare`, `function nt36672e_panel_unprepare`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.