drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c
Extension
.c
Size
11150 bytes
Lines
386
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct samsung_s6e3fc2x01 {
	struct drm_panel panel;
	struct mipi_dsi_device *dsi;
	struct regulator_bulk_data *supplies;
	struct gpio_desc *reset_gpio;
};

static const struct regulator_bulk_data s6e3fc2x01_supplies[] = {
	{ .supply = "vddio" },
	{ .supply = "vci" },
	{ .supply = "poc" },
};

static inline
struct samsung_s6e3fc2x01 *to_samsung_s6e3fc2x01(struct drm_panel *panel)
{
	return container_of(panel, struct samsung_s6e3fc2x01, panel);
}

#define s6e3fc2x01_test_key_on_lvl1(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0xa5, 0xa5)
#define s6e3fc2x01_test_key_off_lvl1(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0x5a, 0x5a)
#define s6e3fc2x01_test_key_on_lvl2(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
#define s6e3fc2x01_test_key_off_lvl2(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
#define s6e3fc2x01_test_key_on_lvl3(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a)
#define s6e3fc2x01_test_key_off_lvl3(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5)

static void s6e3fc2x01_reset(struct samsung_s6e3fc2x01 *ctx)
{
	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
	usleep_range(5000, 6000);
	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
	usleep_range(5000, 6000);
}

static int s6e3fc2x01_on(struct samsung_s6e3fc2x01 *ctx)
{
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };

	s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);

	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);

	mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x0a);
	mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);

	s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);

	s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x01);
	s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);

	mipi_dsi_usleep_range(&dsi_ctx, 15000, 16000);

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x0f);
	mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);

	s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);
	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
	s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);

	s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xeb, 0x17,
					       0x41, 0x92,
					       0x0e, 0x10,
					       0x82, 0x5a);
	s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);

	/* Column & Page Address Setting */
	mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0x0000, 0x0437);
	mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0x0000, 0x0923);

	/* Horizontal & Vertical sync Setting */
	s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x09);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe8, 0x10, 0x30);
	s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);

	s6e3fc2x01_test_key_on_lvl3(&dsi_ctx);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x88);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07);

Annotation

Implementation Notes