drivers/gpu/drm/panel/panel-samsung-s6e8fc0-m1906f9.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-samsung-s6e8fc0-m1906f9.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-samsung-s6e8fc0-m1906f9.c
Extension
.c
Size
8319 bytes
Lines
302
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct s6e8fc0_ctx {
	struct drm_panel panel;
	struct mipi_dsi_device *dsi;
	struct regulator_bulk_data *supplies;
	struct gpio_desc *reset_gpio;
};

static const struct regulator_bulk_data s6e8fc0_supplies[] = {
	{ .supply = "vdd" },
	{ .supply = "vci" },
};

static inline
struct s6e8fc0_ctx *to_s6e8fc0_ctx(struct drm_panel *panel)
{
	return container_of_const(panel, struct s6e8fc0_ctx, panel);
}

static void s6e8fc0_m1906f9_reset(struct s6e8fc0_ctx *ctx)
{
	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
	usleep_range(12000, 13000);
	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
	usleep_range(2000, 3000);
	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
	usleep_range(10000, 11000);
}

#define s6e8fc0_test_key_on_lvl2(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
#define s6e8fc0_test_key_off_lvl2(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
#define s6e8fc0_test_key_on_lvl3(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a)
#define s6e8fc0_test_key_off_lvl3(ctx) \
	mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5)

static int s6e8fc0_m1906f9_on(struct s6e8fc0_ctx *ctx)
{
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };

	s6e8fc0_test_key_on_lvl3(&dsi_ctx);

	mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x0000);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
				     0x20);
	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
	mipi_dsi_msleep(&dsi_ctx, 50);
	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);

	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x04, 0xed);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed,
				     0xe4, 0x08, 0x96, 0xa4, 0x2a, 0x72, 0xe2,
				     0xca, 0x00);
	s6e8fc0_test_key_off_lvl3(&dsi_ctx);
	s6e8fc0_test_key_on_lvl2(&dsi_ctx);
	s6e8fc0_test_key_on_lvl3(&dsi_ctx);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x93);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x05, 0xf4);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x03);
	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x01, 0x81, 0x04);
	s6e8fc0_test_key_off_lvl2(&dsi_ctx);
	s6e8fc0_test_key_off_lvl3(&dsi_ctx);

	return dsi_ctx.accum_err;
}

static int s6e8fc0_m1906f9_off(struct s6e8fc0_ctx *ctx)
{
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };

	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
	mipi_dsi_msleep(&dsi_ctx, 20);
	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
	mipi_dsi_msleep(&dsi_ctx, 120);

	return dsi_ctx.accum_err;
}

static int s6e8fc0_m1906f9_prepare(struct drm_panel *panel)
{
	struct s6e8fc0_ctx *ctx = to_s6e8fc0_ctx(panel);
	struct device *dev = &ctx->dsi->dev;
	int ret;

	ret = regulator_bulk_enable(ARRAY_SIZE(s6e8fc0_supplies), ctx->supplies);
	if (ret < 0) {
		dev_err(dev, "Failed to enable regulators: %d\n", ret);
		return ret;
	}

Annotation

Implementation Notes