drivers/gpu/drm/panel/panel-visionox-vtdr6130.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panel/panel-visionox-vtdr6130.c- Extension
.c- Size
- 10205 bytes
- Lines
- 326
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/backlight.hlinux/delay.hlinux/gpio/consumer.hlinux/regulator/consumer.hlinux/module.hlinux/of.hdrm/display/drm_dsc.hdrm/drm_mipi_dsi.hdrm/drm_modes.hdrm/drm_panel.hvideo/mipi_display.h
Detected Declarations
struct visionox_vtdr6130function visionox_vtdr6130_resetfunction visionox_vtdr6130_onfunction visionox_vtdr6130_offfunction visionox_vtdr6130_preparefunction visionox_vtdr6130_unpreparefunction visionox_vtdr6130_get_modesfunction visionox_vtdr6130_bl_update_statusfunction visionox_vtdr6130_create_backlightfunction visionox_vtdr6130_probefunction visionox_vtdr6130_remove
Annotated Snippet
struct visionox_vtdr6130 {
struct drm_panel panel;
struct mipi_dsi_device *dsi;
struct gpio_desc *reset_gpio;
struct regulator_bulk_data *supplies;
};
static const struct regulator_bulk_data visionox_vtdr6130_supplies[] = {
{ .supply = "vddio" },
{ .supply = "vci" },
{ .supply = "vdd" },
};
static inline struct visionox_vtdr6130 *to_visionox_vtdr6130(struct drm_panel *panel)
{
return container_of(panel, struct visionox_vtdr6130, panel);
}
static void visionox_vtdr6130_reset(struct visionox_vtdr6130 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
usleep_range(10000, 11000);
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
usleep_range(10000, 11000);
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
usleep_range(10000, 11000);
}
static int visionox_vtdr6130_on(struct visionox_vtdr6130 *ctx)
{
struct mipi_dsi_device *dsi = ctx->dsi;
struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x00,
0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x12, 0x00, 0x00, 0xab,
0x30, 0x80, 0x09, 0x60, 0x04, 0x38, 0x00,
0x28, 0x02, 0x1c, 0x02, 0x1c, 0x02, 0x00,
0x02, 0x0e, 0x00, 0x20, 0x03, 0xdd, 0x00,
0x07, 0x00, 0x0c, 0x02, 0x77, 0x02, 0x8b,
0x18, 0x00, 0x10, 0xf0, 0x07, 0x10, 0x20,
0x00, 0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c,
0x2a, 0x38, 0x46, 0x54, 0x62, 0x69, 0x70,
0x77, 0x79, 0x7b, 0x7d, 0x7e, 0x02, 0x02,
0x22, 0x00, 0x2a, 0x40, 0x2a, 0xbe, 0x3a,
0xfc, 0x3a, 0xfa, 0x3a, 0xf8, 0x3b, 0x38,
0x3b, 0x78, 0x3b, 0xb6, 0x4b, 0xb6, 0x4b,
0xf4, 0x4b, 0xf4, 0x6c, 0x34, 0x84, 0x74,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x01, 0x38, 0x00, 0x14,
0x00, 0x1c, 0x00, 0x01, 0x66, 0x00, 0x14,
0x00, 0x14, 0x00, 0x01, 0x66, 0x00, 0x14,
0x05, 0xcc, 0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x09, 0x11, 0x09, 0x11,
0x08, 0xc1, 0x07, 0xfa, 0x05, 0xa4, 0x00,
0x3c, 0x00, 0x34, 0x00, 0x24, 0x00, 0x0c,
0x00, 0x0c, 0x04, 0x00, 0x35);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x33, 0x00, 0x00,
0x00, 0x3e, 0x00, 0x00, 0x00, 0x3e, 0x00,
0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0x09, 0x09, 0x09,
0x09, 0x09, 0x09, 0x06, 0x01);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x09,
0x09, 0x09);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x10, 0x00, 0x00, 0x06,
0x11, 0x09, 0x3b, 0x09, 0x47, 0x09, 0x47,
0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe, 0x10, 0x10, 0x00, 0x08,
0x22, 0x09, 0x19, 0x09, 0x25, 0x09, 0x25,
0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x80);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x08, 0x08, 0x08);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x81);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);
Annotation
- Immediate include surface: `linux/backlight.h`, `linux/delay.h`, `linux/gpio/consumer.h`, `linux/regulator/consumer.h`, `linux/module.h`, `linux/of.h`, `drm/display/drm_dsc.h`, `drm/drm_mipi_dsi.h`.
- Detected declarations: `struct visionox_vtdr6130`, `function visionox_vtdr6130_reset`, `function visionox_vtdr6130_on`, `function visionox_vtdr6130_off`, `function visionox_vtdr6130_prepare`, `function visionox_vtdr6130_unprepare`, `function visionox_vtdr6130_get_modes`, `function visionox_vtdr6130_bl_update_status`, `function visionox_vtdr6130_create_backlight`, `function visionox_vtdr6130_probe`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.