drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
Extension
.c
Size
9971 bytes
Lines
320
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct xpp055c272 {
	struct device *dev;
	struct drm_panel panel;
	struct gpio_desc *reset_gpio;
	struct regulator *vci;
	struct regulator *iovcc;
};

static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel)
{
	return container_of(panel, struct xpp055c272, panel);
}

static void xpp055c272_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)
{
	/*
	 * Init sequence was supplied by the panel vendor without much
	 * documentation.
	 */
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETMIPI,
				     0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
				     0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,
				     0x00, 0x00, 0x37);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPOWER_EXT, 0x25);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETRGBIF,
				     0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
				     0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETSCR,
				     0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
				     0x00);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETVDC, 0x46);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPANEL, 0x0b);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETCYC, 0x80);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETEQ,
				     0x07, 0x07, 0x0b, 0x0b, 0x03, 0x0b, 0x00, 0x00,
				     0x00, 0x00, 0xff, 0x00, 0xC0, 0x10);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPOWER,
				     0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
				     0x67, 0x77, 0x33, 0x33);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
				     0xff, 0x01, 0xff);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETBGP, 0x09, 0x09);
	mipi_dsi_msleep(dsi_ctx, 20);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGIP1,
				     0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
				     0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,
				     0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
				     0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42,
				     0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58,
				     0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,
				     0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGIP2,
				     0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
				     0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,
				     0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
				     0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88,
				     0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00,
				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,
				     0xa0, 0x00, 0x00, 0x00, 0x00);
	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGAMMA,
				     0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
				     0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,
				     0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,
				     0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13,
				     0x11, 0x18);

	mipi_dsi_msleep(dsi_ctx, 60);
}

static int xpp055c272_unprepare(struct drm_panel *panel)
{
	struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };

	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
	if (dsi_ctx.accum_err)
		return dsi_ctx.accum_err;

	regulator_disable(ctx->iovcc);
	regulator_disable(ctx->vci);

Annotation

Implementation Notes