drivers/gpu/drm/panfrost/panfrost_gpu.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panfrost/panfrost_gpu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panfrost/panfrost_gpu.c- Extension
.c- Size
- 17136 bytes
- Lines
- 571
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bitmap.hlinux/delay.hlinux/dma-mapping.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/platform_device.hlinux/pm_runtime.hdrm/drm_print.hpanfrost_device.hpanfrost_features.hpanfrost_issues.hpanfrost_gpu.hpanfrost_perfcnt.hpanfrost_regs.h
Detected Declarations
struct panfrost_modelfunction panfrost_gpu_irq_handlerfunction panfrost_gpu_soft_resetfunction panfrost_gpu_amlogic_quirkfunction panfrost_gpu_init_quirksfunction panfrost_gpu_init_featuresfunction panfrost_cycle_counter_getfunction panfrost_cycle_counter_putfunction panfrost_cycle_counter_readfunction panfrost_timestamp_readfunction panfrost_get_core_maskfunction panfrost_gpu_power_onfunction panfrost_gpu_power_offfunction panfrost_gpu_suspend_irqfunction panfrost_gpu_initfunction panfrost_gpu_finifunction panfrost_gpu_get_latest_flush_id
Annotated Snippet
struct panfrost_model {
const char *name;
u32 id;
u64 features;
u64 issues;
struct {
u32 revision;
u64 issues;
} revs[MAX_HW_REVS];
};
#define GPU_MODEL(_name, _id, ...) \
{\
.name = __stringify(_name), \
.id = _id, \
.features = hw_features_##_name, \
.issues = hw_issues_##_name, \
.revs = { __VA_ARGS__ }, \
}
#define GPU_REV_EXT(name, _rev, _p, _s, stat) \
{\
.revision = (_rev) << 12 | (_p) << 4 | (_s), \
.issues = hw_issues_##name##_r##_rev##p##_p##stat, \
}
#define GPU_REV(name, r, p) GPU_REV_EXT(name, r, p, 0, )
static const struct panfrost_model gpu_models[] = {
/* T60x has an oddball version */
GPU_MODEL(t600, 0x600,
GPU_REV_EXT(t600, 0, 0, 1, _15dev0)),
GPU_MODEL(t620, 0x620,
GPU_REV(t620, 0, 1), GPU_REV(t620, 1, 0)),
GPU_MODEL(t720, 0x720),
GPU_MODEL(t760, 0x750,
GPU_REV(t760, 0, 0), GPU_REV(t760, 0, 1),
GPU_REV_EXT(t760, 0, 1, 0, _50rel0),
GPU_REV(t760, 0, 2), GPU_REV(t760, 0, 3)),
GPU_MODEL(t820, 0x820),
GPU_MODEL(t830, 0x830),
GPU_MODEL(t860, 0x860),
GPU_MODEL(t880, 0x880),
GPU_MODEL(g71, 0x6000,
GPU_REV_EXT(g71, 0, 0, 1, _05dev0)),
GPU_MODEL(g72, 0x6001),
GPU_MODEL(g51, 0x7000),
GPU_MODEL(g76, 0x7001),
GPU_MODEL(g52, 0x7002),
GPU_MODEL(g31, 0x7003,
GPU_REV(g31, 1, 0)),
GPU_MODEL(g57, 0x9001,
GPU_REV(g57, 0, 0)),
/* MediaTek MT8192 has a Mali-G57 with a different GPU ID from the
* standard. Arm's driver does not appear to handle this model.
* ChromeOS has a hack downstream for it. Treat it as equivalent to
* standard Mali-G57 for now.
*/
GPU_MODEL(g57, 0x9003,
GPU_REV(g57, 0, 0)),
/* MediaTek MT8188 Mali-G57 MC3 */
GPU_MODEL(g57, 0x9093,
GPU_REV(g57, 0, 0)),
{0},
};
static int panfrost_gpu_init_features(struct panfrost_device *pfdev)
{
u32 gpu_id, num_js, major, minor, status, rev;
const char *name = "unknown";
u64 hw_feat = 0;
u64 hw_issues = hw_issues_all;
const struct panfrost_model *model;
int i;
pfdev->features.l2_features = gpu_read(pfdev, GPU_L2_FEATURES);
pfdev->features.core_features = gpu_read(pfdev, GPU_CORE_FEATURES);
pfdev->features.tiler_features = gpu_read(pfdev, GPU_TILER_FEATURES);
pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES);
pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES);
pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES);
pfdev->features.max_threads = gpu_read(pfdev, GPU_THREAD_MAX_THREADS);
pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE);
if (panfrost_has_hw_feature(pfdev, HW_FEATURE_COHERENCY_REG))
pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES);
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bitmap.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/interrupt.h`, `linux/io.h`, `linux/iopoll.h`, `linux/platform_device.h`.
- Detected declarations: `struct panfrost_model`, `function panfrost_gpu_irq_handler`, `function panfrost_gpu_soft_reset`, `function panfrost_gpu_amlogic_quirk`, `function panfrost_gpu_init_quirks`, `function panfrost_gpu_init_features`, `function panfrost_cycle_counter_get`, `function panfrost_cycle_counter_put`, `function panfrost_cycle_counter_read`, `function panfrost_timestamp_read`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.