drivers/gpu/drm/panfrost/panfrost_job.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panfrost/panfrost_job.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panfrost/panfrost_job.c- Extension
.c- Size
- 29978 bytes
- Lines
- 1139
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/platform_device.hlinux/pm_runtime.hlinux/dma-resv.hdrm/gpu_scheduler.hdrm/panfrost_drm.hpanfrost_device.hpanfrost_devfreq.hpanfrost_job.hpanfrost_features.hpanfrost_issues.hpanfrost_gem.hpanfrost_regs.hpanfrost_gpu.hpanfrost_mmu.hpanfrost_dump.h
Detected Declarations
struct panfrost_queue_statestruct panfrost_job_slotstruct panfrost_fencefunction to_panfrost_jobfunction to_panfrost_fencefunction panfrost_job_get_slotfunction panfrost_job_write_affinityfunction panfrost_get_job_chain_flagfunction panfrost_dequeue_jobfunction panfrost_enqueue_jobfunction panfrost_job_hw_submitfunction panfrost_acquire_object_fencesfunction panfrost_attach_object_fencesfunction panfrost_job_pushfunction panfrost_job_cleanupfunction panfrost_job_putfunction panfrost_job_freefunction panfrost_jm_reset_interruptsfunction panfrost_jm_enable_interruptsfunction panfrost_jm_suspend_irqfunction panfrost_job_handle_errfunction panfrost_jm_handle_donefunction panfrost_jm_handle_irqfunction panfrost_jm_handle_irqsfunction panfrost_active_slotsfunction panfrost_resetfunction panfrost_job_timedoutfunction panfrost_reset_workfunction panfrost_jm_irq_handler_threadfunction panfrost_jm_irq_handlerfunction panfrost_jm_initfunction panfrost_jm_finifunction panfrost_jm_openfunction panfrost_jm_closefunction panfrost_jm_is_idlefunction panfrost_jm_ctx_releasefunction panfrost_jm_ctx_putfunction panfrost_jm_ctx_getfunction panfrost_jm_ctx_from_handlefunction jm_ctx_prio_to_drm_sched_priofunction panfrost_jm_ctx_createfunction panfrost_jm_ctx_destroy
Annotated Snippet
struct panfrost_queue_state {
struct drm_gpu_scheduler sched;
u64 fence_context;
u64 emit_seqno;
};
struct panfrost_job_slot {
struct panfrost_queue_state queue[NUM_JOB_SLOTS];
spinlock_t job_lock;
int irq;
};
static struct panfrost_job *
to_panfrost_job(struct drm_sched_job *sched_job)
{
return container_of(sched_job, struct panfrost_job, base);
}
struct panfrost_fence {
struct dma_fence base;
struct drm_device *dev;
/* panfrost seqno for signaled() test */
u64 seqno;
int queue;
};
static inline struct panfrost_fence *
to_panfrost_fence(struct dma_fence *fence)
{
return (struct panfrost_fence *)fence;
}
static const char *panfrost_fence_get_driver_name(struct dma_fence *fence)
{
return "panfrost";
}
static const char *panfrost_fence_get_timeline_name(struct dma_fence *fence)
{
struct panfrost_fence *f = to_panfrost_fence(fence);
switch (f->queue) {
case 0:
return "panfrost-js-0";
case 1:
return "panfrost-js-1";
case 2:
return "panfrost-js-2";
default:
return NULL;
}
}
static const struct dma_fence_ops panfrost_fence_ops = {
.get_driver_name = panfrost_fence_get_driver_name,
.get_timeline_name = panfrost_fence_get_timeline_name,
};
static struct dma_fence *panfrost_fence_create(struct panfrost_device *pfdev, int js_num)
{
struct panfrost_fence *fence;
struct panfrost_job_slot *js = pfdev->js;
fence = kzalloc_obj(*fence);
if (!fence)
return ERR_PTR(-ENOMEM);
fence->dev = &pfdev->base;
fence->queue = js_num;
fence->seqno = ++js->queue[js_num].emit_seqno;
dma_fence_init(&fence->base, &panfrost_fence_ops, &js->job_lock,
js->queue[js_num].fence_context, fence->seqno);
return &fence->base;
}
int panfrost_job_get_slot(struct panfrost_job *job)
{
/* JS0: fragment jobs.
* JS1: vertex/tiler jobs
* JS2: compute jobs
*/
if (job->requirements & PANFROST_JD_REQ_FS)
return 0;
/* Not exposed to userspace yet */
#if 0
if (job->requirements & PANFROST_JD_REQ_ONLY_COMPUTE) {
if ((job->requirements & PANFROST_JD_REQ_CORE_GRP_MASK) &&
(job->pfdev->features.nr_core_groups == 2))
Annotation
- Immediate include surface: `linux/delay.h`, `linux/interrupt.h`, `linux/io.h`, `linux/iopoll.h`, `linux/platform_device.h`, `linux/pm_runtime.h`, `linux/dma-resv.h`, `drm/gpu_scheduler.h`.
- Detected declarations: `struct panfrost_queue_state`, `struct panfrost_job_slot`, `struct panfrost_fence`, `function to_panfrost_job`, `function to_panfrost_fence`, `function panfrost_job_get_slot`, `function panfrost_job_write_affinity`, `function panfrost_get_job_chain_flag`, `function panfrost_dequeue_job`, `function panfrost_enqueue_job`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.