drivers/gpu/drm/panfrost/panfrost_regs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/panfrost/panfrost_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/panfrost/panfrost_regs.h- Extension
.h- Size
- 18440 bytes
- Lines
- 383
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __PANFROST_REGS_H__
#define __PANFROST_REGS_H__
#define GPU_ID 0x00
#define GPU_L2_FEATURES 0x004 /* (RO) Level 2 cache features */
#define GPU_CORE_FEATURES 0x008 /* (RO) Shader Core Features */
#define GPU_TILER_FEATURES 0x00C /* (RO) Tiler Features */
#define GPU_MEM_FEATURES 0x010 /* (RO) Memory system features */
#define GROUPS_L2_COHERENT BIT(0) /* Cores groups are l2 coherent */
#define GPU_MMU_FEATURES 0x014 /* (RO) MMU features */
#define GPU_MMU_FEATURES_VA_BITS(x) ((x) & GENMASK(7, 0))
#define GPU_MMU_FEATURES_PA_BITS(x) (((x) >> 8) & GENMASK(7, 0))
#define GPU_AS_PRESENT 0x018 /* (RO) Address space slots present */
#define GPU_JS_PRESENT 0x01C /* (RO) Job slots present */
#define GPU_INT_RAWSTAT 0x20
#define GPU_INT_CLEAR 0x24
#define GPU_INT_MASK 0x28
#define GPU_INT_STAT 0x2c
#define GPU_IRQ_FAULT BIT(0)
#define GPU_IRQ_MULTIPLE_FAULT BIT(7)
#define GPU_IRQ_RESET_COMPLETED BIT(8)
#define GPU_IRQ_POWER_CHANGED BIT(9)
#define GPU_IRQ_POWER_CHANGED_ALL BIT(10)
#define GPU_IRQ_PERFCNT_SAMPLE_COMPLETED BIT(16)
#define GPU_IRQ_CLEAN_CACHES_COMPLETED BIT(17)
#define GPU_IRQ_MASK_ALL \
(GPU_IRQ_FAULT |\
GPU_IRQ_MULTIPLE_FAULT |\
GPU_IRQ_RESET_COMPLETED |\
GPU_IRQ_POWER_CHANGED |\
GPU_IRQ_POWER_CHANGED_ALL |\
GPU_IRQ_PERFCNT_SAMPLE_COMPLETED |\
GPU_IRQ_CLEAN_CACHES_COMPLETED)
#define GPU_IRQ_MASK_ERROR \
( \
GPU_IRQ_FAULT |\
GPU_IRQ_MULTIPLE_FAULT)
#define GPU_CMD 0x30
#define GPU_CMD_SOFT_RESET 0x01
#define GPU_CMD_HARD_RESET 0x02
#define GPU_CMD_PERFCNT_CLEAR 0x03
#define GPU_CMD_PERFCNT_SAMPLE 0x04
#define GPU_CMD_CYCLE_COUNT_START 0x05
#define GPU_CMD_CYCLE_COUNT_STOP 0x06
#define GPU_CMD_CLEAN_CACHES 0x07
#define GPU_CMD_CLEAN_INV_CACHES 0x08
#define GPU_STATUS 0x34
#define GPU_STATUS_PRFCNT_ACTIVE BIT(2)
#define GPU_LATEST_FLUSH_ID 0x38
#define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */
#define GPU_PWR_KEY_UNLOCK 0x2968A819
#define GPU_PWR_OVERRIDE0 0x54 /* (RW) Power manager override settings */
#define GPU_PWR_OVERRIDE1 0x58 /* (RW) Power manager override settings */
#define GPU_FAULT_STATUS 0x3C
#define GPU_FAULT_ADDRESS_LO 0x40
#define GPU_FAULT_ADDRESS_HI 0x44
#define GPU_PERFCNT_BASE_LO 0x60
#define GPU_PERFCNT_BASE_HI 0x64
#define GPU_PERFCNT_CFG 0x68
#define GPU_PERFCNT_CFG_MODE(x) (x)
#define GPU_PERFCNT_CFG_MODE_OFF 0
#define GPU_PERFCNT_CFG_MODE_MANUAL 1
#define GPU_PERFCNT_CFG_MODE_TILE 2
#define GPU_PERFCNT_CFG_AS(x) ((x) << 4)
#define GPU_PERFCNT_CFG_SETSEL(x) ((x) << 8)
#define GPU_PRFCNT_JM_EN 0x6c
#define GPU_PRFCNT_SHADER_EN 0x70
#define GPU_PRFCNT_TILER_EN 0x74
#define GPU_PRFCNT_MMU_L2_EN 0x7c
#define GPU_CYCLE_COUNT_LO 0x90
#define GPU_CYCLE_COUNT_HI 0x94
#define GPU_TIMESTAMP_LO 0x98
#define GPU_TIMESTAMP_HI 0x9C
#define GPU_THREAD_MAX_THREADS 0x0A0 /* (RO) Maximum number of threads per core */
#define GPU_THREAD_MAX_WORKGROUP_SIZE 0x0A4 /* (RO) Maximum workgroup size */
#define GPU_THREAD_MAX_BARRIER_SIZE 0x0A8 /* (RO) Maximum threads waiting at a barrier */
#define GPU_THREAD_FEATURES 0x0AC /* (RO) Thread features */
#define GPU_THREAD_TLS_ALLOC 0x310 /* (RO) Number of threads per core that
* TLS must be allocated for */
#define GPU_TEXTURE_FEATURES(n) (0x0B0 + ((n) * 4))
#define GPU_JS_FEATURES(n) (0x0C0 + ((n) * 4))
#define GPU_AFBC_FEATURES (0x4C) /* (RO) AFBC support on Bifrost */
#define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.