drivers/gpu/drm/radeon/radeon.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/radeon.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/radeon/radeon.h- Extension
.h- Size
- 96463 bytes
- Lines
- 2967
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/agp_backend.hlinux/atomic.hlinux/wait.hlinux/list.hlinux/kref.hlinux/interval_tree.hlinux/hashtable.hlinux/dma-fence.hlinux/mmu_notifier.hdrm/ttm/ttm_bo.hdrm/ttm/ttm_placement.hdrm/drm_exec.hdrm/drm_gem.hdrm/drm_audio_component.hdrm/drm_suballoc.hdrm/drm_print.hradeon_family.hradeon_mode.hradeon_reg.hclearstate_defs.hradeon_object.h
Detected Declarations
struct radeon_devicestruct radeon_dummy_pagestruct radeon_clockstruct radeon_fence_driverstruct radeon_fencestruct radeon_surface_regstruct radeon_mmanstruct radeon_bo_liststruct radeon_bo_vastruct radeon_bostruct radeon_sa_managerstruct radeon_gemstruct radeon_semaphorestruct radeon_syncstruct radeon_mcstruct radeon_gartstruct radeon_mcstruct radeon_scratchstruct radeon_doorbellstruct radeon_flip_workstruct r500_irq_stat_regsstruct r600_irq_stat_regsstruct evergreen_irq_stat_regsstruct cik_irq_stat_regsstruct radeon_irqstruct radeon_ibstruct radeon_ringstruct radeon_mecstruct radeon_vm_ptstruct radeon_vm_idstruct radeon_vmstruct radeon_vm_managerstruct radeon_fprivstruct r600_ihstruct radeon_rlcstruct radeon_cs_chunkstruct radeon_cs_parserstruct radeon_cs_packetstruct radeon_agp_modestruct radeon_agp_infostruct radeon_agp_headstruct radeon_wbstruct radeon_pm_profilestruct radeon_voltagestruct radeon_pm_clock_infostruct radeon_power_statestruct radeon_psstruct radeon_dpm_thermal
Annotated Snippet
struct radeon_dummy_page {
uint64_t entry;
struct page *page;
dma_addr_t addr;
};
int radeon_dummy_page_init(struct radeon_device *rdev);
void radeon_dummy_page_fini(struct radeon_device *rdev);
/*
* Clocks
*/
struct radeon_clock {
struct radeon_pll p1pll;
struct radeon_pll p2pll;
struct radeon_pll dcpll;
struct radeon_pll spll;
struct radeon_pll mpll;
/* 10 Khz units */
uint32_t default_mclk;
uint32_t default_sclk;
uint32_t default_dispclk;
uint32_t current_dispclk;
uint32_t dp_extclk;
uint32_t max_pixel_clock;
uint32_t vco_freq;
};
/*
* Power management
*/
int radeon_pm_init(struct radeon_device *rdev);
int radeon_pm_late_init(struct radeon_device *rdev);
void radeon_pm_fini(struct radeon_device *rdev);
void radeon_pm_compute_clocks(struct radeon_device *rdev);
void radeon_pm_suspend(struct radeon_device *rdev);
void radeon_pm_resume(struct radeon_device *rdev);
void radeon_combios_get_power_modes(struct radeon_device *rdev);
void radeon_atombios_get_power_modes(struct radeon_device *rdev);
int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
u8 clock_type,
u32 clock,
bool strobe_mode,
struct atom_clock_dividers *dividers);
int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev,
u32 clock,
bool strobe_mode,
struct atom_mpll_param *mpll_param);
void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);
int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev,
u16 voltage_level, u8 voltage_type,
u32 *gpio_value, u32 *gpio_mask);
void radeon_atom_set_engine_dram_timings(struct radeon_device *rdev,
u32 eng_clock, u32 mem_clock);
int radeon_atom_get_voltage_step(struct radeon_device *rdev,
u8 voltage_type, u16 *voltage_step);
int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type,
u16 voltage_id, u16 *voltage);
int radeon_atom_get_leakage_vddc_based_on_leakage_idx(struct radeon_device *rdev,
u16 *voltage,
u16 leakage_idx);
int radeon_atom_get_leakage_id_from_vbios(struct radeon_device *rdev,
u16 *leakage_id);
int radeon_atom_get_leakage_vddc_based_on_leakage_params(struct radeon_device *rdev,
u16 *vddc, u16 *vddci,
u16 virtual_voltage_id,
u16 vbios_voltage_id);
int radeon_atom_get_voltage_evv(struct radeon_device *rdev,
u16 virtual_voltage_id,
u16 *voltage);
int radeon_atom_round_to_true_voltage(struct radeon_device *rdev,
u8 voltage_type,
u16 nominal_voltage,
u16 *true_voltage);
int radeon_atom_get_min_voltage(struct radeon_device *rdev,
u8 voltage_type, u16 *min_voltage);
int radeon_atom_get_max_voltage(struct radeon_device *rdev,
u8 voltage_type, u16 *max_voltage);
int radeon_atom_get_voltage_table(struct radeon_device *rdev,
u8 voltage_type, u8 voltage_mode,
struct atom_voltage_table *voltage_table);
bool radeon_atom_is_voltage_gpio(struct radeon_device *rdev,
u8 voltage_type, u8 voltage_mode);
int radeon_atom_get_svi2_info(struct radeon_device *rdev,
u8 voltage_type,
u8 *svd_gpio_id, u8 *svc_gpio_id);
void radeon_atom_update_memory_dll(struct radeon_device *rdev,
u32 mem_clock);
void radeon_atom_set_ac_timing(struct radeon_device *rdev,
u32 mem_clock);
Annotation
- Immediate include surface: `linux/agp_backend.h`, `linux/atomic.h`, `linux/wait.h`, `linux/list.h`, `linux/kref.h`, `linux/interval_tree.h`, `linux/hashtable.h`, `linux/dma-fence.h`.
- Detected declarations: `struct radeon_device`, `struct radeon_dummy_page`, `struct radeon_clock`, `struct radeon_fence_driver`, `struct radeon_fence`, `struct radeon_surface_reg`, `struct radeon_mman`, `struct radeon_bo_list`, `struct radeon_bo_va`, `struct radeon_bo`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.