drivers/gpu/drm/radeon/reg_srcs/r200

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/reg_srcs/r200

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/radeon/reg_srcs/r200
Extension: [no extension]
Size: 4317 bytes
Lines: 187
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: drivers/gpu
Status: atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

r200 0x3294
0x1434 SRC_Y_X
0x1438 DST_Y_X
0x143C DST_HEIGHT_WIDTH
0x146C DP_GUI_MASTER_CNTL
0x1474 BRUSH_Y_X
0x1478 DP_BRUSH_BKGD_CLR
0x147C DP_BRUSH_FRGD_CLR
0x1480 BRUSH_DATA0
0x1484 BRUSH_DATA1
0x1598 DST_WIDTH_HEIGHT
0x15C0 CLR_CMP_CNTL
0x15C4 CLR_CMP_CLR_SRC
0x15C8 CLR_CMP_CLR_DST
0x15CC CLR_CMP_MSK
0x15D8 DP_SRC_FRGD_CLR
0x15DC DP_SRC_BKGD_CLR
0x1600 DST_LINE_START
0x1604 DST_LINE_END
0x1608 DST_LINE_PATCOUNT
0x16C0 DP_CNTL
0x16CC DP_WRITE_MSK
0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
0x16E8 DEFAULT_SC_BOTTOM_RIGHT
0x16EC SC_TOP_LEFT
0x16F0 SC_BOTTOM_RIGHT
0x16F4 SRC_SC_BOTTOM_RIGHT
0x1714 DSTCACHE_CTLSTAT
0x1720 WAIT_UNTIL
0x172C RBBM_GUICNTL
0x1c14 PP_MISC
0x1c18 PP_FOG_COLOR
0x1c1c RE_SOLID_COLOR
0x1c20 RB3D_BLENDCNTL
0x1c4c SE_CNTL
0x1c50 RE_CNTL
0x1cc8 RE_STIPPLE_ADDR
0x1ccc RE_STIPPLE_DATA
0x1cd0 RE_LINE_PATTERN
0x1cd4 RE_LINE_STATE
0x1cd8 RE_SCISSOR_TL_0
0x1cdc RE_SCISSOR_BR_0
0x1ce0 RE_SCISSOR_TL_1
0x1ce4 RE_SCISSOR_BR_1
0x1ce8 RE_SCISSOR_TL_2
0x1cec RE_SCISSOR_BR_2
0x1d60 RB3D_DEPTHXY_OFFSET
0x1d7c RB3D_STENCILREFMASK
0x1d80 RB3D_ROPCNTL
0x1d84 RB3D_PLANEMASK
0x1d98 VAP_VPORT_XSCALE
0x1d9c VAP_VPORT_XOFFSET
0x1da0 VAP_VPORT_YSCALE
0x1da4 VAP_VPORT_YOFFSET
0x1da8 VAP_VPORT_ZSCALE
0x1dac VAP_VPORT_ZOFFSET
0x1db0 SE_ZBIAS_FACTOR
0x1db4 SE_ZBIAS_CONSTANT
0x1db8 SE_LINE_WIDTH
0x2080 SE_VAP_CNTL
0x2090 SE_TCL_OUTPUT_VTX_FMT_0
0x2094 SE_TCL_OUTPUT_VTX_FMT_1
0x20b0 SE_VTE_CNTL
0x2140 SE_CNTL_STATUS
0x2180 SE_VTX_STATE_CNTL
0x2200 SE_TCL_VECTOR_INDX_REG
0x2204 SE_TCL_VECTOR_DATA_REG
0x2208 SE_TCL_SCALAR_INDX_REG
0x220c SE_TCL_SCALAR_DATA_REG
0x2230 SE_TCL_MATRIX_SEL_0

Annotation

Atlas domain: Driver Families / drivers/gpu.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.