drivers/gpu/drm/radeon/sumo_dpm.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/sumo_dpm.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/radeon/sumo_dpm.h
Extension
.h
Size
7558 bytes
Lines
223
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct sumo_pl {
	u32 sclk;
	u32 vddc_index;
	u32 ds_divider_index;
	u32 ss_divider_index;
	u32 allow_gnb_slow;
	u32 sclk_dpm_tdp_limit;
};

/* used for the flags field */
#define SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE (1 << 0)
#define SUMO_POWERSTATE_FLAGS_BOOST_STATE       (1 << 1)

struct sumo_ps {
	struct sumo_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS];
	u32 num_levels;
	/* flags */
	u32 flags;
};

#define NUMBER_OF_M3ARB_PARAM_SETS 10
#define SUMO_MAX_NUMBER_VOLTAGES    4

struct sumo_disp_clock_voltage_mapping_table {
	u32 num_max_voltage_levels;
	u32 display_clock_frequency[SUMO_MAX_NUMBER_VOLTAGES];
};

struct sumo_vid_mapping_entry {
	u16 vid_2bit;
	u16 vid_7bit;
};

struct sumo_vid_mapping_table {
	u32 num_entries;
	struct sumo_vid_mapping_entry entries[SUMO_MAX_NUMBER_VOLTAGES];
};

struct sumo_sclk_voltage_mapping_entry {
	u32 sclk_frequency;
	u16 vid_2bit;
	u16 rsv;
};

struct sumo_sclk_voltage_mapping_table {
	u32 num_max_dpm_entries;
	struct sumo_sclk_voltage_mapping_entry entries[SUMO_MAX_HARDWARE_POWERLEVELS];
};

struct sumo_sys_info {
	u32 bootup_sclk;
	u32 min_sclk;
	u32 bootup_uma_clk;
	u16 bootup_nb_voltage_index;
	u8 htc_tmp_lmt;
	u8 htc_hyst_lmt;
	struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table;
	struct sumo_disp_clock_voltage_mapping_table disp_clk_voltage_mapping_table;
	struct sumo_vid_mapping_table vid_mapping_table;
	u32 csr_m3_arb_cntl_default[NUMBER_OF_M3ARB_PARAM_SETS];
	u32 csr_m3_arb_cntl_uvd[NUMBER_OF_M3ARB_PARAM_SETS];
	u32 csr_m3_arb_cntl_fs3d[NUMBER_OF_M3ARB_PARAM_SETS];
	u32 sclk_dpm_boost_margin;
	u32 sclk_dpm_throttle_margin;
	u32 sclk_dpm_tdp_limit_pg;
	u32 gnb_tdp_limit;
	u32 sclk_dpm_tdp_limit_boost;
	u32 boost_sclk;
	u32 boost_vid_2bit;
	bool enable_boost;
};

struct sumo_power_info {
	u32 asi;
	u32 pasi;
	u32 bsp;
	u32 bsu;
	u32 pbsp;
	u32 pbsu;
	u32 dsp;
	u32 psp;
	u32 thermal_auto_throttling;
	u32 uvd_m3_arbiter;
	u32 fw_version;
	struct sumo_sys_info sys_info;
	struct sumo_pl acpi_pl;
	struct sumo_pl boot_pl;
	struct sumo_pl boost_pl;
	bool disable_gfx_power_gating_in_uvd;
	bool driver_nbps_policy_disable;

Annotation

Implementation Notes