drivers/gpu/drm/radeon/sumod.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/sumod.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/radeon/sumod.h- Extension
.h- Size
- 20519 bytes
- Lines
- 373
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _SUMOD_H_
#define _SUMOD_H_
/* pm registers */
/* rcu */
#define RCU_FW_VERSION 0x30c
#define RCU_PWR_GATING_SEQ0 0x408
#define RCU_PWR_GATING_SEQ1 0x40c
#define RCU_PWR_GATING_CNTL 0x410
# define PWR_GATING_EN (1 << 0)
# define RSVD_MASK (0x3 << 1)
# define PCV(x) ((x) << 3)
# define PCV_MASK (0x1f << 3)
# define PCV_SHIFT 3
# define PCP(x) ((x) << 8)
# define PCP_MASK (0xf << 8)
# define PCP_SHIFT 8
# define RPW(x) ((x) << 16)
# define RPW_MASK (0xf << 16)
# define RPW_SHIFT 16
# define ID(x) ((x) << 24)
# define ID_MASK (0xf << 24)
# define ID_SHIFT 24
# define PGS(x) ((x) << 28)
# define PGS_MASK (0xf << 28)
# define PGS_SHIFT 28
#define RCU_ALTVDDNB_NOTIFY 0x430
#define RCU_LCLK_SCALING_CNTL 0x434
# define LCLK_SCALING_EN (1 << 0)
# define LCLK_SCALING_TYPE (1 << 1)
# define LCLK_SCALING_TIMER_PRESCALER(x) ((x) << 4)
# define LCLK_SCALING_TIMER_PRESCALER_MASK (0xf << 4)
# define LCLK_SCALING_TIMER_PRESCALER_SHIFT 4
# define LCLK_SCALING_TIMER_PERIOD(x) ((x) << 16)
# define LCLK_SCALING_TIMER_PERIOD_MASK (0xf << 16)
# define LCLK_SCALING_TIMER_PERIOD_SHIFT 16
#define RCU_PWR_GATING_CNTL_2 0x4a0
# define MPPU(x) ((x) << 0)
# define MPPU_MASK (0xffff << 0)
# define MPPU_SHIFT 0
# define MPPD(x) ((x) << 16)
# define MPPD_MASK (0xffff << 16)
# define MPPD_SHIFT 16
#define RCU_PWR_GATING_CNTL_3 0x4a4
# define DPPU(x) ((x) << 0)
# define DPPU_MASK (0xffff << 0)
# define DPPU_SHIFT 0
# define DPPD(x) ((x) << 16)
# define DPPD_MASK (0xffff << 16)
# define DPPD_SHIFT 16
#define RCU_PWR_GATING_CNTL_4 0x4a8
# define RT(x) ((x) << 0)
# define RT_MASK (0xffff << 0)
# define RT_SHIFT 0
# define IT(x) ((x) << 16)
# define IT_MASK (0xffff << 16)
# define IT_SHIFT 16
/* yes these two have the same address */
#define RCU_PWR_GATING_CNTL_5 0x504
#define RCU_GPU_BOOST_DISABLE 0x508
#define MCU_M3ARB_INDEX 0x504
#define MCU_M3ARB_PARAMS 0x508
#define RCU_GNB_PWR_REP_TIMER_CNTL 0x50C
#define RCU_SclkDpmTdpLimit01 0x514
#define RCU_SclkDpmTdpLimit23 0x518
#define RCU_SclkDpmTdpLimit47 0x51C
#define RCU_SclkDpmTdpLimitPG 0x520
#define GNB_TDP_LIMIT 0x540
#define RCU_BOOST_MARGIN 0x544
#define RCU_THROTTLE_MARGIN 0x548
#define SMU_PCIE_PG_ARGS 0x58C
#define SMU_PCIE_PG_ARGS_2 0x598
#define SMU_PCIE_PG_ARGS_3 0x59C
/* mmio */
#define RCU_STATUS 0x11c
# define GMC_PWR_GATER_BUSY (1 << 8)
# define GFX_PWR_GATER_BUSY (1 << 9)
# define UVD_PWR_GATER_BUSY (1 << 10)
# define PCIE_PWR_GATER_BUSY (1 << 11)Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.