drivers/gpu/drm/radeon/trinity_dpm.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/trinity_dpm.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/radeon/trinity_dpm.h
Extension
.h
Size
4042 bytes
Lines
134
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct trinity_pl {
	u32 sclk;
	u8 vddc_index;
	u8 ds_divider_index;
	u8 ss_divider_index;
	u8 allow_gnb_slow;
	u8 force_nbp_state;
	u8 display_wm;
	u8 vce_wm;
};

#define TRINITY_POWERSTATE_FLAGS_NBPS_FORCEHIGH  (1 << 0)
#define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH (1 << 1)
#define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOLOW  (1 << 2)

#define TRINITY_POWERSTATE_FLAGS_BAPM_DISABLE    (1 << 0)

struct trinity_ps {
	u32 num_levels;
	struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS];

	u32 nbps_flags;
	u32 bapm_flags;

	u8 Dpm0PgNbPsLo;
	u8 Dpm0PgNbPsHi;
	u8 DpmXNbPsLo;
	u8 DpmXNbPsHi;

	u32 vclk_low_divider;
	u32 vclk_high_divider;
	u32 dclk_low_divider;
	u32 dclk_high_divider;
};

#define TRINITY_NUM_NBPSTATES   4

struct trinity_uvd_clock_table_entry {
	u32 vclk;
	u32 dclk;
	u8 vclk_did;
	u8 dclk_did;
	u8 rsv[2];
};

struct trinity_sys_info {
	u32 bootup_uma_clk;
	u32 bootup_sclk;
	u32 min_sclk;
	u32 dentist_vco_freq;
	u32 nb_dpm_enable;
	u32 nbp_mclk[TRINITY_NUM_NBPSTATES];
	u32 nbp_nclk[TRINITY_NUM_NBPSTATES];
	u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];
	u16 bootup_nb_voltage_index;
	u8 htc_tmp_lmt;
	u8 htc_hyst_lmt;
	struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table;
	struct sumo_vid_mapping_table vid_mapping_table;
	u32 uma_channel_number;
	struct trinity_uvd_clock_table_entry uvd_clock_table_entries[4];
};

struct trinity_power_info {
	u32 at[SUMO_MAX_HARDWARE_POWERLEVELS];
	u32 dpm_interval;
	u32 thermal_auto_throttling;
	struct trinity_sys_info sys_info;
	struct trinity_pl boot_pl;
	u32 min_sclk_did;
	bool enable_nbps_policy;
	bool voltage_drop_in_dce;
	bool override_dynamic_mgpg;
	bool enable_gfx_clock_gating;
	bool enable_gfx_power_gating;
	bool enable_mg_clock_gating;
	bool enable_gfx_dynamic_mgpg;
	bool enable_auto_thermal_throttling;
	bool enable_dpm;
	bool enable_sclk_ds;
	bool enable_bapm;
	bool uvd_dpm;
	struct radeon_ps current_rps;
	struct trinity_ps current_ps;
	struct radeon_ps requested_rps;
	struct trinity_ps requested_ps;
};

#define TRINITY_AT_DFLT            30

Annotation

Implementation Notes