drivers/gpu/drm/radeon/uvd_v4_2.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/radeon/uvd_v4_2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/radeon/uvd_v4_2.c- Extension
.c- Size
- 2538 bytes
- Lines
- 79
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hradeon.hradeon_asic.hcikd.h
Detected Declarations
function files
Annotated Snippet
#include <linux/firmware.h>
#include "radeon.h"
#include "radeon_asic.h"
#include "cikd.h"
/**
* uvd_v4_2_resume - memory controller programming
*
* @rdev: radeon_device pointer
*
* Let the UVD memory controller know it's offsets
*/
int uvd_v4_2_resume(struct radeon_device *rdev)
{
uint64_t addr;
uint32_t size;
/* program the VCPU memory controller bits 0-27 */
/* skip over the header of the new firmware format */
if (rdev->uvd.fw_header_present)
addr = (rdev->uvd.gpu_addr + 0x200) >> 3;
else
addr = rdev->uvd.gpu_addr >> 3;
size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
WREG32(UVD_VCPU_CACHE_SIZE0, size);
addr += size;
size = RADEON_UVD_HEAP_SIZE >> 3;
WREG32(UVD_VCPU_CACHE_OFFSET1, addr);
WREG32(UVD_VCPU_CACHE_SIZE1, size);
addr += size;
size = (RADEON_UVD_STACK_SIZE +
(RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3;
WREG32(UVD_VCPU_CACHE_OFFSET2, addr);
WREG32(UVD_VCPU_CACHE_SIZE2, size);
/* bits 28-31 */
addr = (rdev->uvd.gpu_addr >> 28) & 0xF;
WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));
/* bits 32-39 */
addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
if (rdev->uvd.fw_header_present)
WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles);
return 0;
}
Annotation
- Immediate include surface: `linux/firmware.h`, `radeon.h`, `radeon_asic.h`, `cikd.h`.
- Detected declarations: `function files`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.