drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
Extension
.h
Size
11332 bytes
Lines
320
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __RCAR_MIPI_DSI_REGS_H__
#define __RCAR_MIPI_DSI_REGS_H__

#define LINKSR				0x010
#define LINKSR_LPBUSY			BIT_U32(1)
#define LINKSR_HSBUSY			BIT_U32(0)

#define TXSETR				0x100
#define TXSETR_LANECNT_MASK		GENMASK_U32(1, 0)

/*
 * DSI Command Transfer Registers
 */
#define TXCMSETR			0x110
#define TXCMSETR_SPDTYP			BIT_U32(8)	/* 0:HS 1:LP */
#define TXCMSETR_LPPDACC		BIT_U32(0)
#define TXCMCR				0x120
#define TXCMCR_BTATYP			BIT_U32(2)
#define TXCMCR_BTAREQ			BIT_U32(1)
#define TXCMCR_TXREQ			BIT_U32(0)
#define TXCMSR				0x130
#define TXCMSR_CLSNERR			BIT_U32(18)
#define TXCMSR_AXIERR			BIT_U32(16)
#define TXCMSR_TXREQEND			BIT_U32(0)
#define TXCMSCR				0x134
#define TXCMSCR_CLSNERR			BIT_U32(18)
#define TXCMSCR_AXIERR			BIT_U32(16)
#define TXCMSCR_TXREQEND		BIT_U32(0)
#define TXCMIER				0x138
#define TXCMIER_CLSNERR			BIT_U32(18)
#define TXCMIER_AXIERR			BIT_U32(16)
#define TXCMIER_TXREQEND		BIT_U32(0)
#define TXCMADDRSET0R			0x140
#define TXCMPHDR			0x150
#define TXCMPHDR_FMT			BIT_U32(24)	/* 0:SP 1:LP */
#define TXCMPHDR_VC_MASK		GENMASK_U32(23, 22)
#define TXCMPHDR_VC(n)			FIELD_PREP(TXCMPHDR_VC_MASK, (n))
#define TXCMPHDR_DT_MASK		GENMASK_U32(21, 16)
#define TXCMPHDR_DT(n)			FIELD_PREP(TXCMPHDR_DT_MASK, (n))
#define TXCMPHDR_DATA1_MASK		GENMASK_U32(15, 8)
#define TXCMPHDR_DATA1(n)		FIELD_PREP(TXCMPHDR_DATA1_MASK, (n))
#define TXCMPHDR_DATA0_MASK		GENMASK_U32(7, 0)
#define TXCMPHDR_DATA0(n)		FIELD_PREP(TXCMPHDR_DATA0_MASK, (n))
#define TXCMPPD0R			0x160
#define TXCMPPD1R			0x164
#define TXCMPPD2R			0x168
#define TXCMPPD3R			0x16c

#define RXSETR				0x200
#define RXSETR_CRCEN_MASK		GENMASK_U32(27, 24)
#define RXSETR_ECCEN_MASK		GENMASK_U32(19, 16)
#define RXPSETR				0x210
#define RXPSETR_LPPDACC			BIT_U32(0)
#define RXPSR				0x220
#define RXPSR_ECCERR1B			BIT_U32(28)
#define RXPSR_UEXTRGERR			BIT_U32(25)
#define RXPSR_RESPTOERR			BIT_U32(24)
#define RXPSR_OVRERR			BIT_U32(23)
#define RXPSR_AXIERR			BIT_U32(22)
#define RXPSR_CRCERR			BIT_U32(21)
#define RXPSR_WCERR			BIT_U32(20)
#define RXPSR_UEXDTERR			BIT_U32(19)
#define RXPSR_UEXPKTERR			BIT_U32(18)
#define RXPSR_ECCERR			BIT_U32(17)
#define RXPSR_MLFERR			BIT_U32(16)
#define RXPSR_RCVACK			BIT_U32(14)
#define RXPSR_RCVEOT			BIT_U32(10)
#define RXPSR_RCVAKE			BIT_U32(9)
#define RXPSR_RCVRESP			BIT_U32(8)
#define RXPSR_BTAREQEND			BIT_U32(0)
#define RXPSCR				0x224
#define RXPSCR_ECCERR1B			BIT_U32(28)
#define RXPSCR_UEXTRGERR		BIT_U32(25)
#define RXPSCR_RESPTOERR		BIT_U32(24)
#define RXPSCR_OVRERR			BIT_U32(23)
#define RXPSCR_AXIERR			BIT_U32(22)
#define RXPSCR_CRCERR			BIT_U32(21)
#define RXPSCR_WCERR			BIT_U32(20)
#define RXPSCR_UEXDTERR			BIT_U32(19)
#define RXPSCR_UEXPKTERR		BIT_U32(18)
#define RXPSCR_ECCERR			BIT_U32(17)
#define RXPSCR_MLFERR			BIT_U32(16)
#define RXPSCR_RCVACK			BIT_U32(14)
#define RXPSCR_RCVEOT			BIT_U32(10)
#define RXPSCR_RCVAKE			BIT_U32(9)
#define RXPSCR_RCVRESP			BIT_U32(8)
#define RXPSCR_BTAREQEND		BIT_U32(0)
#define RXPIER				0x228
#define RXPIER_ECCERR1B			BIT_U32(28)
#define RXPIER_UEXTRGERR		BIT_U32(25)

Annotation

Implementation Notes