drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c- Extension
.c- Size
- 3715 bytes
- Lines
- 141
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hlinux/of.hdrm/drm_atomic_helper.hdrm/drm_bridge.hdrm/drm_bridge_connector.hdrm/drm_panel.hrzg2l_du_drv.hrzg2l_du_encoder.h
Detected Declarations
function Copyrightfunction for_each_child_of_nodefunction rzg2l_du_encoder_mode_validfunction rzg2l_du_encoder_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* RZ/G2L Display Unit Encoder
*
* Copyright (C) 2023 Renesas Electronics Corporation
*
* Based on rcar_du_encoder.c
*/
#include <linux/export.h>
#include <linux/of.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_bridge_connector.h>
#include <drm/drm_panel.h>
#include "rzg2l_du_drv.h"
#include "rzg2l_du_encoder.h"
/* -----------------------------------------------------------------------------
* Encoder
*/
static unsigned int rzg2l_du_encoder_count_ports(struct device_node *node)
{
struct device_node *ports;
struct device_node *port;
unsigned int num_ports = 0;
ports = of_get_child_by_name(node, "ports");
if (!ports)
ports = of_node_get(node);
for_each_child_of_node(ports, port) {
if (of_node_name_eq(port, "port"))
num_ports++;
}
of_node_put(ports);
return num_ports;
}
static const struct drm_encoder_funcs rzg2l_du_encoder_funcs = {
};
static enum drm_mode_status
rzg2l_du_encoder_mode_valid(struct drm_encoder *encoder,
const struct drm_display_mode *mode)
{
struct rzg2l_du_encoder *renc = to_rzg2l_encoder(encoder);
struct rzg2l_du_device *rcdu = to_rzg2l_du_device(renc->base.dev);
const struct rzg2l_du_device_info *info = rcdu->info;
if (renc->output != RZG2L_DU_OUTPUT_DPAD0)
return MODE_OK;
if (mode->clock < info->mode_clock_min)
return MODE_CLOCK_LOW;
if (mode->clock > info->mode_clock_max)
return MODE_CLOCK_HIGH;
return MODE_OK;
}
static const struct drm_encoder_helper_funcs rzg2l_du_encoder_helper_funcs = {
.mode_valid = rzg2l_du_encoder_mode_valid,
};
int rzg2l_du_encoder_init(struct rzg2l_du_device *rcdu,
enum rzg2l_du_output output,
struct device_node *enc_node)
{
struct rzg2l_du_encoder *renc;
struct drm_connector *connector;
struct drm_bridge *bridge __free(drm_bridge_put) = NULL;
int ret;
/*
* Locate the DRM bridge from the DT node. For the DPAD outputs, if the
* DT node has a single port, assume that it describes a panel and
* create a panel bridge.
*/
if (output == RZG2L_DU_OUTPUT_DPAD0 && rzg2l_du_encoder_count_ports(enc_node) == 1) {
struct drm_panel *panel = of_drm_find_panel(enc_node);
if (IS_ERR(panel))
return PTR_ERR(panel);
Annotation
- Immediate include surface: `linux/export.h`, `linux/of.h`, `drm/drm_atomic_helper.h`, `drm/drm_bridge.h`, `drm/drm_bridge_connector.h`, `drm/drm_panel.h`, `rzg2l_du_drv.h`, `rzg2l_du_encoder.h`.
- Detected declarations: `function Copyright`, `function for_each_child_of_node`, `function rzg2l_du_encoder_mode_valid`, `function rzg2l_du_encoder_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.