drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c- Extension
.c- Size
- 42710 bytes
- Lines
- 1561
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk/renesas.hlinux/delay.hlinux/dma-mapping.hlinux/io.hlinux/iopoll.hlinux/math.hlinux/module.hlinux/of.hlinux/of_graph.hlinux/platform_device.hlinux/pm_runtime.hlinux/reset.hlinux/slab.hlinux/units.hdrm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_bridge.hdrm/drm_mipi_dsi.hdrm/drm_of.hdrm/drm_panel.hdrm/drm_probe_helper.hvideo/mipi_display.hrzg2l_mipi_dsi_regs.h
Detected Declarations
struct rzg2l_mipi_dsistruct rzg2l_mipi_dsi_hw_infostruct rzv2h_dsi_mode_calcstruct rzg2l_mipi_dsistruct rzg2l_mipi_dsi_timingsstruct rzv2h_mipi_dsi_timingsenum rzv2h_dsi_timing_idxfunction bridge_to_rzg2l_mipi_dsifunction host_to_rzg2l_mipi_dsifunction rzv2h_dphy_find_ulpsexitfunction rzv2h_dphy_find_timings_valfunction rzg2l_mipi_dsi_phy_writefunction rzg2l_mipi_dsi_link_writefunction rzg2l_mipi_dsi_phy_readfunction rzg2l_mipi_dsi_link_readfunction rzg2l_mipi_dsi_dphy_initfunction rzg2l_mipi_dsi_dphy_exitfunction rzg2l_dphy_conf_clksfunction rzv2h_dphy_mode_clk_checkfunction rzv2h_dphy_conf_clksfunction rzv2h_mipi_dsi_dphy_initfunction rzv2h_mipi_dsi_dphy_startup_late_initfunction rzv2h_mipi_dsi_dphy_exitfunction rzg2l_mipi_dsi_startupfunction rzg2l_mipi_dsi_stopfunction rzg2l_mipi_dsi_set_display_timingfunction rzg2l_mipi_dsi_start_hs_clockfunction rzg2l_mipi_dsi_stop_hs_clockfunction rzg2l_mipi_dsi_start_videofunction rzg2l_mipi_dsi_stop_videofunction rzg2l_mipi_dsi_attachfunction rzg2l_mipi_dsi_atomic_pre_enablefunction rzg2l_mipi_dsi_atomic_enablefunction rzg2l_mipi_dsi_atomic_disablefunction rzg2l_mipi_dsi_atomic_post_disablefunction rzg2l_mipi_dsi_bridge_mode_validfunction rzg2l_mipi_dsi_host_attachfunction rzg2l_mipi_dsi_host_detachfunction rzg2l_mipi_dsi_read_responsefunction rzg2l_mipi_dsi_host_transferfunction rzg2l_mipi_pm_runtime_suspendfunction rzg2l_mipi_pm_runtime_resumefunction rzg2l_mipi_dsi_probefunction rzg2l_mipi_dsi_remove
Annotated Snippet
struct rzg2l_mipi_dsi_hw_info {
int (*dphy_init)(struct rzg2l_mipi_dsi *dsi, u64 hsfreq_millihz);
void (*dphy_startup_late_init)(struct rzg2l_mipi_dsi *dsi);
void (*dphy_exit)(struct rzg2l_mipi_dsi *dsi);
int (*dphy_conf_clks)(struct rzg2l_mipi_dsi *dsi, unsigned long mode_freq,
u64 *hsfreq_millihz);
unsigned int (*dphy_mode_clk_check)(struct rzg2l_mipi_dsi *dsi,
unsigned long mode_freq);
struct {
const struct rzv2h_pll_limits **limits;
const u8 *table;
const u8 table_size;
} cpg_plldsi;
u32 phy_reg_offset;
u32 link_reg_offset;
unsigned long min_dclk;
unsigned long max_dclk;
u8 features;
};
struct rzv2h_dsi_mode_calc {
unsigned long mode_freq_khz;
struct rzv2h_pll_pars dsi_parameters;
};
struct rzg2l_mipi_dsi {
struct device *dev;
void __iomem *mmio;
const struct rzg2l_mipi_dsi_hw_info *info;
struct reset_control *rstc;
struct reset_control *arstc;
struct reset_control *prstc;
struct mipi_dsi_host host;
struct drm_bridge bridge;
struct drm_bridge *next_bridge;
struct clk *vclk;
struct clk *lpclk;
enum mipi_dsi_pixel_format format;
unsigned int num_data_lanes;
unsigned int lanes;
unsigned long mode_flags;
struct rzv2h_dsi_mode_calc mode_calc;
/* DCS buffer pointers when using external memory. */
dma_addr_t dcs_buf_phys;
u8 *dcs_buf_virt;
};
static const struct rzv2h_pll_limits rzv2h_plldsi_div_limits = {
.fout = { .min = 80 * MEGA, .max = 1500 * MEGA },
.fvco = { .min = 1050 * MEGA, .max = 2100 * MEGA },
.m = { .min = 64, .max = 1023 },
.p = { .min = 1, .max = 4 },
.s = { .min = 0, .max = 5 },
.k = { .min = -32768, .max = 32767 },
};
static inline struct rzg2l_mipi_dsi *
bridge_to_rzg2l_mipi_dsi(struct drm_bridge *bridge)
{
return container_of(bridge, struct rzg2l_mipi_dsi, bridge);
}
static inline struct rzg2l_mipi_dsi *
host_to_rzg2l_mipi_dsi(struct mipi_dsi_host *host)
{
return container_of(host, struct rzg2l_mipi_dsi, host);
}
struct rzg2l_mipi_dsi_timings {
unsigned long hsfreq_max;
u32 t_init;
u32 tclk_prepare;
u32 ths_prepare;
u32 tclk_zero;
u32 tclk_pre;
u32 tclk_post;
u32 tclk_trail;
u32 ths_zero;
u32 ths_trail;
u32 ths_exit;
u32 tlpx;
};
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk/renesas.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/io.h`, `linux/iopoll.h`, `linux/math.h`.
- Detected declarations: `struct rzg2l_mipi_dsi`, `struct rzg2l_mipi_dsi_hw_info`, `struct rzv2h_dsi_mode_calc`, `struct rzg2l_mipi_dsi`, `struct rzg2l_mipi_dsi_timings`, `struct rzv2h_mipi_dsi_timings`, `enum rzv2h_dsi_timing_idx`, `function bridge_to_rzg2l_mipi_dsi`, `function host_to_rzg2l_mipi_dsi`, `function rzv2h_dphy_find_ulpsexit`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.