drivers/gpu/drm/rockchip/cdn-dp-reg.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/rockchip/cdn-dp-reg.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/rockchip/cdn-dp-reg.h
Extension: .h
Size: 14544 bytes
Lines: 475
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/bitops.h

Detected Declarations

enum voltage_swing_level
enum pre_emphasis_level
enum pattern_set
enum vic_color_depth
enum vic_bt_type

Annotated Snippet

#ifndef _CDN_DP_REG_H
#define _CDN_DP_REG_H

#include <linux/bitops.h>

#define ADDR_IMEM		0x10000
#define ADDR_DMEM		0x20000

/* APB CFG addr */
#define APB_CTRL			0
#define XT_INT_CTRL			0x04
#define MAILBOX_FULL_ADDR		0x08
#define MAILBOX_EMPTY_ADDR		0x0c
#define MAILBOX0_WR_DATA		0x10
#define MAILBOX0_RD_DATA		0x14
#define KEEP_ALIVE			0x18
#define VER_L				0x1c
#define VER_H				0x20
#define VER_LIB_L_ADDR			0x24
#define VER_LIB_H_ADDR			0x28
#define SW_DEBUG_L			0x2c
#define SW_DEBUG_H			0x30
#define MAILBOX_INT_MASK		0x34
#define MAILBOX_INT_STATUS		0x38
#define SW_CLK_L			0x3c
#define SW_CLK_H			0x40
#define SW_EVENTS0			0x44
#define SW_EVENTS1			0x48
#define SW_EVENTS2			0x4c
#define SW_EVENTS3			0x50
#define XT_OCD_CTRL			0x60
#define APB_INT_MASK			0x6c
#define APB_STATUS_MASK			0x70

/* audio decoder addr */
#define AUDIO_SRC_CNTL			0x30000
#define AUDIO_SRC_CNFG			0x30004
#define COM_CH_STTS_BITS		0x30008
#define STTS_BIT_CH(x)			(0x3000c + ((x) << 2))
#define SPDIF_CTRL_ADDR			0x3004c
#define SPDIF_CH1_CS_3100_ADDR		0x30050
#define SPDIF_CH1_CS_6332_ADDR		0x30054
#define SPDIF_CH1_CS_9564_ADDR		0x30058
#define SPDIF_CH1_CS_12796_ADDR		0x3005c
#define SPDIF_CH1_CS_159128_ADDR	0x30060
#define SPDIF_CH1_CS_191160_ADDR	0x30064
#define SPDIF_CH2_CS_3100_ADDR		0x30068
#define SPDIF_CH2_CS_6332_ADDR		0x3006c
#define SPDIF_CH2_CS_9564_ADDR		0x30070
#define SPDIF_CH2_CS_12796_ADDR		0x30074
#define SPDIF_CH2_CS_159128_ADDR	0x30078
#define SPDIF_CH2_CS_191160_ADDR	0x3007c
#define SMPL2PKT_CNTL			0x30080
#define SMPL2PKT_CNFG			0x30084
#define FIFO_CNTL			0x30088
#define FIFO_STTS			0x3008c

/* source pif addr */
#define SOURCE_PIF_WR_ADDR		0x30800
#define SOURCE_PIF_WR_REQ		0x30804
#define SOURCE_PIF_RD_ADDR		0x30808
#define SOURCE_PIF_RD_REQ		0x3080c
#define SOURCE_PIF_DATA_WR		0x30810
#define SOURCE_PIF_DATA_RD		0x30814
#define SOURCE_PIF_FIFO1_FLUSH		0x30818
#define SOURCE_PIF_FIFO2_FLUSH		0x3081c
#define SOURCE_PIF_STATUS		0x30820
#define SOURCE_PIF_INTERRUPT_SOURCE	0x30824
#define SOURCE_PIF_INTERRUPT_MASK	0x30828
#define SOURCE_PIF_PKT_ALLOC_REG	0x3082c
#define SOURCE_PIF_PKT_ALLOC_WR_EN	0x30830
#define SOURCE_PIF_SW_RESET		0x30834

/* below registers need access by mailbox */
/* source car addr */
#define SOURCE_HDTX_CAR			0x0900
#define SOURCE_DPTX_CAR			0x0904
#define SOURCE_PHY_CAR			0x0908
#define SOURCE_CEC_CAR			0x090c
#define SOURCE_CBUS_CAR			0x0910
#define SOURCE_PKT_CAR			0x0918
#define SOURCE_AIF_CAR			0x091c
#define SOURCE_CIPHER_CAR		0x0920
#define SOURCE_CRYPTO_CAR		0x0924

/* clock meters addr */
#define CM_CTRL				0x0a00
#define CM_I2S_CTRL			0x0a04
#define CM_SPDIF_CTRL			0x0a08
#define CM_VID_CTRL			0x0a0c

Annotation

Immediate include surface: `linux/bitops.h`.
Detected declarations: `enum voltage_swing_level`, `enum pre_emphasis_level`, `enum pattern_set`, `enum vic_color_depth`, `enum vic_bt_type`.
Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.