drivers/gpu/drm/sprd/sprd_dsi.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/sprd/sprd_dsi.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/sprd/sprd_dsi.h
Extension
.h
Size
2819 bytes
Lines
127
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dphy_pll {
	u8 refin; /* Pre-divider control signal */
	u8 cp_s; /* 00: SDM_EN=1, 10: SDM_EN=0 */
	u8 fdk_s; /* PLL mode control: integer or fraction */
	u8 sdm_en;
	u8 div;
	u8 int_n; /* integer N PLL */
	u32 ref_clk; /* dphy reference clock, unit: MHz */
	u32 freq; /* panel config, unit: KHz */
	u32 fvco;
	u32 potential_fvco;
	u32 nint; /* sigma delta modulator NINT control */
	u32 kint; /* sigma delta modulator KINT control */
	u8 lpf_sel; /* low pass filter control */
	u8 out_sel; /* post divider control */
	u8 vco_band; /* vco range */
	u8 det_delay;
};

struct dsi_context {
	void __iomem *base;
	struct regmap *regmap;
	struct dphy_pll pll;
	struct videomode vm;
	bool enabled;

	u8 work_mode;
	u8 burst_mode;
	u32 int0_mask;
	u32 int1_mask;

	/* maximum time (ns) for data lanes from HS to LP */
	u16 data_hs2lp;
	/* maximum time (ns) for data lanes from LP to HS */
	u16 data_lp2hs;
	/* maximum time (ns) for clk lanes from HS to LP */
	u16 clk_hs2lp;
	/* maximum time (ns) for clk lanes from LP to HS */
	u16 clk_lp2hs;
	/* maximum time (ns) for BTA operation - REQUIRED */
	u16 max_rd_time;
	/* enable receiving frame ack packets - for video mode */
	bool frame_ack_en;
	/* enable receiving tear effect ack packets - for cmd mode */
	bool te_ack_en;
};

struct sprd_dsi {
	struct drm_device *drm;
	struct mipi_dsi_host host;
	struct mipi_dsi_device *slave;
	struct drm_encoder encoder;
	struct drm_bridge *panel_bridge;
	struct dsi_context ctx;
};

int dphy_pll_config(struct dsi_context *ctx);
void dphy_timing_config(struct dsi_context *ctx);

#endif /* __SPRD_DSI_H__ */

Annotation

Implementation Notes