drivers/gpu/drm/sti/sti_awg_utils.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/sti/sti_awg_utils.h

Extension

.h

Size

689 bytes

Lines

35

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h

Detected Declarations

• struct awg_code_generation_params
• struct awg_timing

Annotated Snippet

struct awg_code_generation_params {
	u32 *ram_code;
	u8 instruction_offset;
};

struct awg_timing {
	u32 total_lines;
	u32 active_lines;
	u32 blanking_lines;
	u32 trailing_lines;
	u32 total_pixels;
	u32 active_pixels;
	u32 blanking_pixels;
	u32 trailing_pixels;
	u32 blanking_level;
};

int sti_awg_generate_code_data_enable_mode(
		struct awg_code_generation_params *fw_gen_params,
		struct awg_timing *timing);
#endif

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `struct awg_code_generation_params`, `struct awg_timing`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.