drivers/gpu/drm/sti/sti_dvo.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/sti/sti_dvo.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/sti/sti_dvo.c- Extension
.c- Size
- 14941 bytes
- Lines
- 579
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/component.hlinux/debugfs.hlinux/io.hlinux/module.hlinux/of.hlinux/platform_device.hdrm/drm_atomic_helper.hdrm/drm_bridge.hdrm/drm_device.hdrm/drm_panel.hdrm/drm_print.hdrm/drm_probe_helper.hsti_awg_utils.hsti_drv.hsti_mixer.h
Detected Declarations
struct dvo_configstruct sti_dvostruct sti_dvo_connectorfunction dvo_awg_generate_codefunction dvo_awg_configurefunction readlfunction dvo_dbg_showfunction dvo_debugfs_initfunction sti_dvo_disablefunction sti_dvo_pre_enablefunction sti_dvo_set_modefunction sti_dvo_bridge_nopefunction sti_dvo_connector_get_modesfunction sti_dvo_connector_mode_validfunction sti_dvo_connector_detectfunction sti_dvo_late_registerfunction list_for_each_entryfunction sti_dvo_bindfunction sti_dvo_unbindfunction sti_dvo_probefunction sti_dvo_remove
Annotated Snippet
struct dvo_config {
u32 flags;
u32 lowbyte;
u32 midbyte;
u32 highbyte;
int (*awg_fwgen_fct)(
struct awg_code_generation_params *fw_gen_params,
struct awg_timing *timing);
};
static struct dvo_config rgb_24bit_de_cfg = {
.flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
.lowbyte = DVO_LUT_CR_R,
.midbyte = DVO_LUT_Y_G,
.highbyte = DVO_LUT_CB_B,
.awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
};
/*
* STI digital video output structure
*
* @dev: driver device
* @drm_dev: pointer to drm device
* @mode: current display mode selected
* @regs: dvo registers
* @clk_pix: pixel clock for dvo
* @clk: clock for dvo
* @clk_main_parent: dvo parent clock if main path used
* @clk_aux_parent: dvo parent clock if aux path used
* @panel_node: panel node reference from device tree
* @panel: reference to the panel connected to the dvo
* @enabled: true if dvo is enabled else false
* @encoder: drm_encoder it is bound
*/
struct sti_dvo {
struct device dev;
struct drm_device *drm_dev;
struct drm_display_mode mode;
void __iomem *regs;
struct clk *clk_pix;
struct clk *clk;
struct clk *clk_main_parent;
struct clk *clk_aux_parent;
struct device_node *panel_node;
struct drm_panel *panel;
struct dvo_config *config;
bool enabled;
struct drm_encoder *encoder;
struct drm_bridge bridge;
};
struct sti_dvo_connector {
struct drm_connector drm_connector;
struct drm_encoder *encoder;
struct sti_dvo *dvo;
};
#define to_sti_dvo_connector(x) \
container_of(x, struct sti_dvo_connector, drm_connector)
#define BLANKING_LEVEL 16
static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
{
struct drm_display_mode *mode = &dvo->mode;
struct dvo_config *config = dvo->config;
struct awg_code_generation_params fw_gen_params;
struct awg_timing timing;
fw_gen_params.ram_code = ram_code;
fw_gen_params.instruction_offset = 0;
timing.total_lines = mode->vtotal;
timing.active_lines = mode->vdisplay;
timing.blanking_lines = mode->vsync_start - mode->vdisplay;
timing.trailing_lines = mode->vtotal - mode->vsync_start;
timing.total_pixels = mode->htotal;
timing.active_pixels = mode->hdisplay;
timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
timing.trailing_pixels = mode->htotal - mode->hsync_start;
timing.blanking_level = BLANKING_LEVEL;
if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
DRM_ERROR("AWG firmware not properly generated\n");
return -EINVAL;
}
*ram_size = fw_gen_params.instruction_offset;
return 0;
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/component.h`, `linux/debugfs.h`, `linux/io.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`, `drm/drm_atomic_helper.h`.
- Detected declarations: `struct dvo_config`, `struct sti_dvo`, `struct sti_dvo_connector`, `function dvo_awg_generate_code`, `function dvo_awg_configure`, `function readl`, `function dvo_dbg_show`, `function dvo_debugfs_init`, `function sti_dvo_disable`, `function sti_dvo_pre_enable`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.