drivers/gpu/drm/sti/sti_hqvdp.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/sti/sti_hqvdp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/sti/sti_hqvdp.c- Extension
.c- Size
- 40579 bytes
- Lines
- 1422
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/component.hlinux/delay.hlinux/dma-mapping.hlinux/firmware.hlinux/io.hlinux/module.hlinux/of.hlinux/reset.hlinux/seq_file.hdrm/drm_atomic.hdrm/drm_device.hdrm/drm_fb_dma_helper.hdrm/drm_fourcc.hdrm/drm_framebuffer.hdrm/drm_gem_dma_helper.hdrm/drm_print.hsti_compositor.hsti_drv.hsti_hqvdp_lut.hsti_plane.hsti_vtg.h
Detected Declarations
struct sti_hqvdp_topstruct sti_hqvdp_vc1restruct sti_hqvdp_fmdstruct sti_hqvdp_csdistruct sti_hqvdp_hvsrcstruct sti_hqvdp_iqistruct sti_hqvdp_top_statusstruct sti_hqvdp_fmd_statusstruct sti_hqvdp_csdi_statusstruct sti_hqvdp_hvsrc_statusstruct sti_hqvdp_iqi_statusstruct sti_hqvdp_cmdstruct sti_hqvdpstruct fw_headerenum sti_hvsrc_orientfunction usedfunction sti_hqvdp_get_curr_cmdfunction sti_hqvdp_get_next_cmdfunction readlfunction hqvdp_dbg_dump_cmdfunction hqvdp_dbg_showfunction hqvdp_debugfs_initfunction sti_hqvdp_update_hvsrcfunction sti_hqvdp_check_hw_scalingfunction sti_hqvdp_disablefunction sti_hqvdp_vtg_cbfunction sti_hqvdp_initfunction sti_hqvdp_init_plugsfunction sti_hqvdp_start_xp70function sti_hqvdp_atomic_checkfunction sti_hqvdp_atomic_updatefunction sti_hqvdp_atomic_disablefunction sti_hqvdp_late_registerfunction sti_hqvdp_bindfunction sti_hqvdp_unbindfunction sti_hqvdp_probefunction sti_hqvdp_remove
Annotated Snippet
struct sti_hqvdp_top {
u32 config;
u32 mem_format;
u32 current_luma;
u32 current_enh_luma;
u32 current_right_luma;
u32 current_enh_right_luma;
u32 current_chroma;
u32 current_enh_chroma;
u32 current_right_chroma;
u32 current_enh_right_chroma;
u32 output_luma;
u32 output_chroma;
u32 luma_src_pitch;
u32 luma_enh_src_pitch;
u32 luma_right_src_pitch;
u32 luma_enh_right_src_pitch;
u32 chroma_src_pitch;
u32 chroma_enh_src_pitch;
u32 chroma_right_src_pitch;
u32 chroma_enh_right_src_pitch;
u32 luma_processed_pitch;
u32 chroma_processed_pitch;
u32 input_frame_size;
u32 input_viewport_ori;
u32 input_viewport_ori_right;
u32 input_viewport_size;
u32 left_view_border_width;
u32 right_view_border_width;
u32 left_view_3d_offset_width;
u32 right_view_3d_offset_width;
u32 side_stripe_color;
u32 crc_reset_ctrl;
};
/* Configs for interlaced : no IT, no pass thru, 3 fields */
#define TOP_CONFIG_INTER_BTM 0x00000000
#define TOP_CONFIG_INTER_TOP 0x00000002
/* Config for progressive : no IT, no pass thru, 3 fields */
#define TOP_CONFIG_PROGRESSIVE 0x00000001
/* Default MemFormat: in=420_raster_dual out=444_raster;opaque Mem2Tv mode */
#define TOP_MEM_FORMAT_DFLT 0x00018060
/* Min/Max size */
#define MAX_WIDTH 0x1FFF
#define MAX_HEIGHT 0x0FFF
#define MIN_WIDTH 0x0030
#define MIN_HEIGHT 0x0010
struct sti_hqvdp_vc1re {
u32 ctrl_prv_csdi;
u32 ctrl_cur_csdi;
u32 ctrl_nxt_csdi;
u32 ctrl_cur_fmd;
u32 ctrl_nxt_fmd;
};
struct sti_hqvdp_fmd {
u32 config;
u32 viewport_ori;
u32 viewport_size;
u32 next_next_luma;
u32 next_next_right_luma;
u32 next_next_next_luma;
u32 next_next_next_right_luma;
u32 threshold_scd;
u32 threshold_rfd;
u32 threshold_move;
u32 threshold_cfd;
};
struct sti_hqvdp_csdi {
u32 config;
u32 config2;
u32 dcdi_config;
u32 prev_luma;
u32 prev_enh_luma;
u32 prev_right_luma;
u32 prev_enh_right_luma;
u32 next_luma;
u32 next_enh_luma;
u32 next_right_luma;
u32 next_enh_right_luma;
u32 prev_chroma;
u32 prev_enh_chroma;
u32 prev_right_chroma;
u32 prev_enh_right_chroma;
u32 next_chroma;
Annotation
- Immediate include surface: `linux/component.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/firmware.h`, `linux/io.h`, `linux/module.h`, `linux/of.h`, `linux/reset.h`.
- Detected declarations: `struct sti_hqvdp_top`, `struct sti_hqvdp_vc1re`, `struct sti_hqvdp_fmd`, `struct sti_hqvdp_csdi`, `struct sti_hqvdp_hvsrc`, `struct sti_hqvdp_iqi`, `struct sti_hqvdp_top_status`, `struct sti_hqvdp_fmd_status`, `struct sti_hqvdp_csdi_status`, `struct sti_hqvdp_hvsrc_status`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.