drivers/gpu/drm/sun4i/sun4i_tcon.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/sun4i/sun4i_tcon.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/sun4i/sun4i_tcon.h- Extension
.h- Size
- 11232 bytes
- Lines
- 304
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_crtc.hlinux/kernel.hlinux/list.hlinux/mod_devicetable.hlinux/reset.h
Detected Declarations
struct sun4i_tconstruct sun4i_tcon_quirksstruct sun4i_tcon
Annotated Snippet
struct sun4i_tcon_quirks {
bool has_channel_0; /* a83t does not have channel 0 on second TCON */
bool has_channel_1; /* a33 does not have channel 1 */
bool has_lvds_alt; /* Does the LVDS clock have a parent other than the TCON clock? */
bool needs_de_be_mux; /* sun6i needs mux to select backend */
bool needs_edp_reset; /* a80 edp reset needed for tcon0 access */
bool supports_lvds; /* Does the TCON support an LVDS output? */
bool polarity_in_ch0; /* some tcon1 channels have polarity bits in tcon0 pol register */
u8 dclk_min_div; /* minimum divider for TCON0 DCLK */
/* callback to handle tcon muxing options */
int (*set_mux)(struct sun4i_tcon *, const struct drm_encoder *);
/* handler for LVDS setup routine */
void (*setup_lvds_phy)(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder);
};
struct sun4i_tcon {
struct device *dev;
struct drm_device *drm;
struct regmap *regs;
/* Main bus clock */
struct clk *clk;
/* Clocks for the TCON channels */
struct clk *sclk0;
struct clk *sclk1;
/* Possible mux for the LVDS clock */
struct clk *lvds_pll;
/* Pixel clock */
struct clk *dclk;
u8 dclk_max_div;
u8 dclk_min_div;
/* Reset control */
struct reset_control *lcd_rst;
struct reset_control *lvds_rst;
/* Platform adjustments */
const struct sun4i_tcon_quirks *quirks;
/* Associated crtc */
struct sun4i_crtc *crtc;
int id;
/* TCON list management */
struct list_head list;
};
struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node);
struct drm_panel *sun4i_tcon_find_panel(struct device_node *node);
void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable);
void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder,
const struct drm_display_mode *mode);
void sun4i_tcon_set_status(struct sun4i_tcon *crtc,
const struct drm_encoder *encoder, bool enable);
extern const struct of_device_id sun4i_tcon_of_table[];
#endif /* __SUN4I_TCON_H__ */
Annotation
- Immediate include surface: `drm/drm_crtc.h`, `linux/kernel.h`, `linux/list.h`, `linux/mod_devicetable.h`, `linux/reset.h`.
- Detected declarations: `struct sun4i_tcon`, `struct sun4i_tcon_quirks`, `struct sun4i_tcon`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.