drivers/gpu/drm/tegra/nvdec.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/tegra/nvdec.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/tegra/nvdec.c- Extension
.c- Size
- 13591 bytes
- Lines
- 579
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/host1x.hlinux/iommu.hlinux/iopoll.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/pm_runtime.hlinux/reset.hsoc/tegra/mc.hdrm.hfalcon.hriscv.hvic.h
Detected Declarations
struct nvdec_configstruct nvdecfunction nvdec_writelfunction nvdec_boot_falconfunction nvdec_wait_debuginfofunction nvdec_boot_riscvfunction nvdec_initfunction nvdec_exitfunction nvdec_load_falcon_firmwarefunction nvdec_runtime_resumefunction nvdec_runtime_suspendfunction nvdec_open_channelfunction nvdec_close_channelfunction nvdec_can_use_memory_ctxfunction nvdec_probefunction nvdec_remove
Annotated Snippet
struct nvdec_config {
const char *firmware;
unsigned int version;
bool supports_sid;
bool has_riscv;
bool has_extra_clocks;
};
struct nvdec {
struct falcon falcon;
void __iomem *regs;
struct tegra_drm_client client;
struct host1x_channel *channel;
struct device *dev;
struct clk_bulk_data clks[3];
unsigned int num_clks;
struct reset_control *reset;
/* Platform configuration */
const struct nvdec_config *config;
/* RISC-V specific data */
struct tegra_drm_riscv riscv;
phys_addr_t carveout_base;
};
static inline struct nvdec *to_nvdec(struct tegra_drm_client *client)
{
return container_of(client, struct nvdec, client);
}
static inline void nvdec_writel(struct nvdec *nvdec, u32 value,
unsigned int offset)
{
writel(value, nvdec->regs + offset);
}
static int nvdec_boot_falcon(struct nvdec *nvdec)
{
u32 stream_id;
int err;
if (nvdec->config->supports_sid && tegra_dev_iommu_get_stream_id(nvdec->dev, &stream_id)) {
u32 value;
value = TRANSCFG_ATT(1, TRANSCFG_SID_FALCON) | TRANSCFG_ATT(0, TRANSCFG_SID_HW);
nvdec_writel(nvdec, value, NVDEC_TFBIF_TRANSCFG);
nvdec_writel(nvdec, stream_id, VIC_THI_STREAMID0);
nvdec_writel(nvdec, stream_id, VIC_THI_STREAMID1);
}
err = falcon_boot(&nvdec->falcon);
if (err < 0)
return err;
err = falcon_wait_idle(&nvdec->falcon);
if (err < 0) {
dev_err(nvdec->dev, "falcon boot timed out\n");
return err;
}
return 0;
}
static int nvdec_wait_debuginfo(struct nvdec *nvdec, const char *phase)
{
int err;
u32 val;
err = readl_poll_timeout(nvdec->regs + NVDEC_FALCON_DEBUGINFO, val, val == 0x0, 10, 100000);
if (err) {
dev_err(nvdec->dev, "failed to boot %s, debuginfo=0x%x\n", phase, val);
return err;
}
return 0;
}
static int nvdec_boot_riscv(struct nvdec *nvdec)
{
int err;
err = reset_control_acquire(nvdec->reset);
if (err)
return err;
nvdec_writel(nvdec, 0xabcd1234, NVDEC_FALCON_DEBUGINFO);
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/host1x.h`, `linux/iommu.h`, `linux/iopoll.h`, `linux/module.h`, `linux/of.h`.
- Detected declarations: `struct nvdec_config`, `struct nvdec`, `function nvdec_writel`, `function nvdec_boot_falcon`, `function nvdec_wait_debuginfo`, `function nvdec_boot_riscv`, `function nvdec_init`, `function nvdec_exit`, `function nvdec_load_falcon_firmware`, `function nvdec_runtime_resume`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.