drivers/gpu/drm/tegra/sor.c

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/tegra/sor.c

Extension

.c

Size

104122 bytes

Lines

4085

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/clk.h
• linux/clk-provider.h
• linux/debugfs.h
• linux/io.h
• linux/module.h
• linux/of.h
• linux/platform_device.h
• linux/pm_runtime.h
• linux/regulator/consumer.h
• linux/reset.h
• linux/string_choices.h
• soc/tegra/pmc.h
• drm/display/drm_dp_helper.h
• drm/display/drm_scdc_helper.h
• drm/drm_atomic_helper.h
• drm/drm_debugfs.h
• drm/drm_edid.h
• drm/drm_eld.h
• drm/drm_encoder.h
• drm/drm_file.h
• drm/drm_panel.h
• drm/drm_print.h
• dc.h
• dp.h
• drm.h
• hda.h
• sor.h
• trace.h

Detected Declarations

• struct tegra_sor_hdmi_settings
• struct tegra_sor_regs
• struct tegra_sor_soc
• struct tegra_sor
• struct tegra_sor_ops
• struct tegra_sor
• struct tegra_sor_state
• struct tegra_sor_config
• struct tegra_clk_sor_pad
• struct tegra_sor_params
• function to_sor_state
• function host1x_client_to_sor
• function tegra_sor_readl
• function tegra_sor_writel
• function tegra_sor_set_parent_clock
• function tegra_clk_sor_pad_set_parent
• function tegra_clk_sor_pad_get_parent
• function tegra_sor_filter_rates
• function tegra_sor_power_up_lanes
• function tegra_sor_power_down_lanes
• function tegra_sor_dp_precharge
• function tegra_sor_dp_term_calibrate
• function tegra_sor_dp_link_apply_training
• function tegra_sor_dp_link_configure
• function tegra_sor_super_update
• function tegra_sor_update
• function tegra_sor_setup_pwm
• function tegra_sor_attach
• function tegra_sor_wakeup
• function tegra_sor_power_up
• function tegra_sor_compute_params
• function tegra_sor_compute_config
• function tegra_sor_apply_config
• function tegra_sor_mode_set
• function tegra_sor_detach
• function tegra_sor_power_down
• function tegra_sor_crc_wait
• function tegra_sor_show_crc
• function tegra_sor_show_regs
• function tegra_sor_late_register
• function tegra_sor_early_unregister
• function tegra_sor_connector_reset
• function tegra_sor_connector_detect
• function tegra_sor_connector_duplicate_state
• function tegra_sor_connector_get_modes
• function tegra_sor_connector_mode_valid
• function tegra_sor_encoder_atomic_check
• function tegra_sor_hdmi_subpack

Annotated Snippet

struct tegra_sor_hdmi_settings {
	unsigned long frequency;

	u8 vcocap;
	u8 filter;
	u8 ichpmp;
	u8 loadadj;
	u8 tmds_termadj;
	u8 tx_pu_value;
	u8 bg_temp_coef;
	u8 bg_vref_level;
	u8 avdd10_level;
	u8 avdd14_level;
	u8 sparepll;

	u8 drive_current[4];
	u8 preemphasis[4];
};

#if 1
static const struct tegra_sor_hdmi_settings tegra210_sor_hdmi_defaults[] = {
	{
		.frequency = 54000000,
		.vcocap = 0x0,
		.filter = 0x0,
		.ichpmp = 0x1,
		.loadadj = 0x3,
		.tmds_termadj = 0x9,
		.tx_pu_value = 0x10,
		.bg_temp_coef = 0x3,
		.bg_vref_level = 0x8,
		.avdd10_level = 0x4,
		.avdd14_level = 0x4,
		.sparepll = 0x0,
		.drive_current = { 0x33, 0x3a, 0x3a, 0x3a },
		.preemphasis = { 0x00, 0x00, 0x00, 0x00 },
	}, {
		.frequency = 75000000,
		.vcocap = 0x3,
		.filter = 0x0,
		.ichpmp = 0x1,
		.loadadj = 0x3,
		.tmds_termadj = 0x9,
		.tx_pu_value = 0x40,
		.bg_temp_coef = 0x3,
		.bg_vref_level = 0x8,
		.avdd10_level = 0x4,
		.avdd14_level = 0x4,
		.sparepll = 0x0,
		.drive_current = { 0x33, 0x3a, 0x3a, 0x3a },
		.preemphasis = { 0x00, 0x00, 0x00, 0x00 },
	}, {
		.frequency = 150000000,
		.vcocap = 0x3,
		.filter = 0x0,
		.ichpmp = 0x1,
		.loadadj = 0x3,
		.tmds_termadj = 0x9,
		.tx_pu_value = 0x66,
		.bg_temp_coef = 0x3,
		.bg_vref_level = 0x8,
		.avdd10_level = 0x4,
		.avdd14_level = 0x4,
		.sparepll = 0x0,
		.drive_current = { 0x33, 0x3a, 0x3a, 0x3a },
		.preemphasis = { 0x00, 0x00, 0x00, 0x00 },
	}, {
		.frequency = 300000000,
		.vcocap = 0x3,
		.filter = 0x0,
		.ichpmp = 0x1,
		.loadadj = 0x3,
		.tmds_termadj = 0x9,
		.tx_pu_value = 0x66,
		.bg_temp_coef = 0x3,
		.bg_vref_level = 0xa,
		.avdd10_level = 0x4,
		.avdd14_level = 0x4,
		.sparepll = 0x0,
		.drive_current = { 0x33, 0x3f, 0x3f, 0x3f },
		.preemphasis = { 0x00, 0x17, 0x17, 0x17 },
	}, {
		.frequency = 600000000,
		.vcocap = 0x3,
		.filter = 0x0,
		.ichpmp = 0x1,
		.loadadj = 0x3,
		.tmds_termadj = 0x9,
		.tx_pu_value = 0x66,
		.bg_temp_coef = 0x3,

Annotation

• Immediate include surface: `linux/clk.h`, `linux/clk-provider.h`, `linux/debugfs.h`, `linux/io.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`, `linux/pm_runtime.h`.
• Detected declarations: `struct tegra_sor_hdmi_settings`, `struct tegra_sor_regs`, `struct tegra_sor_soc`, `struct tegra_sor`, `struct tegra_sor_ops`, `struct tegra_sor`, `struct tegra_sor_state`, `struct tegra_sor_config`, `struct tegra_clk_sor_pad`, `struct tegra_sor_params`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.