drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/tests/drm_dp_mst_helper_test.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/tests/drm_dp_mst_helper_test.c- Extension
.c- Size
- 13443 bytes
- Lines
- 578
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
kunit/test.hdrm/display/drm_dp_mst_helper.hdrm/drm_print.h../display/drm_dp_mst_topology_internal.h
Detected Declarations
struct drm_dp_mst_calc_pbn_mode_teststruct drm_dp_mst_calc_pbn_div_teststruct drm_dp_mst_sideband_msg_req_testfunction drm_test_dp_mst_calc_pbn_modefunction dp_mst_calc_pbn_mode_descfunction drm_test_dp_mst_calc_pbn_divfunction dp_mst_calc_pbn_div_descfunction sideband_msg_req_equalfunction drm_test_dp_mst_msg_printffunction drm_test_dp_mst_sideband_msg_req_decodefunction drm_dp_mst_sideband_msg_req_desc
Annotated Snippet
struct drm_dp_mst_calc_pbn_mode_test {
const int clock;
const int bpp;
const bool dsc;
const int expected;
};
static const struct drm_dp_mst_calc_pbn_mode_test drm_dp_mst_calc_pbn_mode_cases[] = {
{
.clock = 154000,
.bpp = 30,
.dsc = false,
.expected = 689
},
{
.clock = 234000,
.bpp = 30,
.dsc = false,
.expected = 1047
},
{
.clock = 297000,
.bpp = 24,
.dsc = false,
.expected = 1063
},
{
.clock = 332880,
.bpp = 24,
.dsc = true,
.expected = 1191
},
{
.clock = 324540,
.bpp = 24,
.dsc = true,
.expected = 1161
},
};
static void drm_test_dp_mst_calc_pbn_mode(struct kunit *test)
{
const struct drm_dp_mst_calc_pbn_mode_test *params = test->param_value;
KUNIT_EXPECT_EQ(test, drm_dp_calc_pbn_mode(params->clock, params->bpp << 4),
params->expected);
}
static void dp_mst_calc_pbn_mode_desc(const struct drm_dp_mst_calc_pbn_mode_test *t, char *desc)
{
sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled");
}
KUNIT_ARRAY_PARAM(drm_dp_mst_calc_pbn_mode, drm_dp_mst_calc_pbn_mode_cases,
dp_mst_calc_pbn_mode_desc);
struct drm_dp_mst_calc_pbn_div_test {
int link_rate;
int lane_count;
fixed20_12 expected;
};
#define fp_init(__int, __frac) { \
.full = (__int) * (1 << 12) + \
(__frac) * (1 << 12) / 100000 \
}
static const struct drm_dp_mst_calc_pbn_div_test drm_dp_mst_calc_pbn_div_dp1_4_cases[] = {
/*
* UHBR rates (DP Standard v2.1 2.7.6.3, specifying the rounded to
* closest value to 2 decimal places):
* .expected = .link_rate * .lane_count * 0.9671 / 8 / 54 / 100
* DP1.4 rates (DP Standard v2.1 2.6.4.2):
* .expected = .link_rate * .lane_count * 0.8000 / 8 / 54 / 100
*
* truncated to 5 decimal places.
*/
{
.link_rate = 2000000,
.lane_count = 4,
.expected = fp_init(179, 9259), /* 179.09259 */
},
{
.link_rate = 2000000,
.lane_count = 2,
.expected = fp_init(89, 54629),
},
{
.link_rate = 2000000,
.lane_count = 1,
Annotation
- Immediate include surface: `kunit/test.h`, `drm/display/drm_dp_mst_helper.h`, `drm/drm_print.h`, `../display/drm_dp_mst_topology_internal.h`.
- Detected declarations: `struct drm_dp_mst_calc_pbn_mode_test`, `struct drm_dp_mst_calc_pbn_div_test`, `struct drm_dp_mst_sideband_msg_req_test`, `function drm_test_dp_mst_calc_pbn_mode`, `function dp_mst_calc_pbn_mode_desc`, `function drm_test_dp_mst_calc_pbn_div`, `function dp_mst_calc_pbn_div_desc`, `function sideband_msg_req_equal`, `function drm_test_dp_mst_msg_printf`, `function drm_test_dp_mst_sideband_msg_req_decode`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.