drivers/gpu/drm/tidss/tidss_dispc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/tidss/tidss_dispc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/tidss/tidss_dispc.h- Extension
.h- Size
- 4815 bytes
- Lines
- 152
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_color_mgmt.htidss_drv.h
Detected Declarations
struct dispc_devicestruct drm_crtc_statestruct drm_plane_statestruct tidss_vp_featstruct tidss_vp_color_featstruct tidss_plane_featstruct tidss_plane_color_featstruct tidss_plane_blend_featstruct dispc_features_scalingstruct dispc_vid_infostruct dispc_erratastruct dispc_featuresenum tidss_gamma_typeenum dispc_vp_bus_typeenum dispc_dss_subrevision
Annotated Snippet
struct tidss_vp_feat {
struct tidss_vp_color_feat {
u32 gamma_size;
enum tidss_gamma_type gamma_type;
bool has_ctm;
} color;
};
struct tidss_plane_feat {
struct tidss_plane_color_feat {
u32 encodings;
u32 ranges;
enum drm_color_encoding default_encoding;
enum drm_color_range default_range;
} color;
struct tidss_plane_blend_feat {
bool global_alpha;
} blend;
};
struct dispc_features_scaling {
u32 in_width_max_5tap_rgb;
u32 in_width_max_3tap_rgb;
u32 in_width_max_5tap_yuv;
u32 in_width_max_3tap_yuv;
u32 upscale_limit;
u32 downscale_limit_5tap;
u32 downscale_limit_3tap;
u32 xinc_max;
};
struct dispc_vid_info {
const char *name; /* Should match dt reg names */
u32 hw_id;
bool is_lite;
};
struct dispc_errata {
bool i2000; /* DSS Does Not Support YUV Pixel Data Formats */
};
enum dispc_vp_bus_type {
DISPC_VP_DPI, /* DPI output */
DISPC_VP_OLDI_AM65X, /* OLDI (LVDS) output for AM65x DSS */
DISPC_VP_INTERNAL, /* SoC internal routing */
DISPC_VP_TIED_OFF, /* Tied off / Unavailable */
DISPC_VP_MAX_BUS_TYPE,
};
enum dispc_dss_subrevision {
DISPC_K2G,
DISPC_AM625,
DISPC_AM62L,
DISPC_AM62A7,
DISPC_AM65X,
DISPC_J721E,
};
struct dispc_features {
struct dispc_features_scaling scaling;
enum dispc_dss_subrevision subrev;
const char *common;
const u16 *common_regs;
u32 num_vps;
const char *vp_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */
const char *ovr_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */
const char *vpclk_name[TIDSS_MAX_PORTS]; /* Should match dt clk names */
const enum dispc_vp_bus_type vp_bus_type[TIDSS_MAX_PORTS];
struct tidss_vp_feat vp_feat;
u32 num_vids;
struct dispc_vid_info vid_info[TIDSS_MAX_PLANES];
u32 vid_order[TIDSS_MAX_PLANES];
};
extern const struct dispc_features dispc_k2g_feats;
extern const struct dispc_features dispc_am625_feats;
extern const struct dispc_features dispc_am62a7_feats;
extern const struct dispc_features dispc_am62l_feats;
extern const struct dispc_features dispc_am65x_feats;
extern const struct dispc_features dispc_j721e_feats;
int tidss_configure_oldi(struct tidss_device *tidss, u32 hw_videoport,
u32 oldi_cfg);
void tidss_disable_oldi(struct tidss_device *tidss, u32 hw_videoport);
unsigned int dispc_pclk_diff(unsigned long rate, unsigned long real_rate);
void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask);
dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc);
Annotation
- Immediate include surface: `drm/drm_color_mgmt.h`, `tidss_drv.h`.
- Detected declarations: `struct dispc_device`, `struct drm_crtc_state`, `struct drm_plane_state`, `struct tidss_vp_feat`, `struct tidss_vp_color_feat`, `struct tidss_plane_feat`, `struct tidss_plane_color_feat`, `struct tidss_plane_blend_feat`, `struct dispc_features_scaling`, `struct dispc_vid_info`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.