drivers/gpu/drm/tyr/driver.rs
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/tyr/driver.rs
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/tyr/driver.rs- Extension
.rs- Size
- 5756 bytes
- Lines
- 212
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct Clocksstruct Regulatorsfunction Okfunction drop
Annotated Snippet
struct Clocks {
core: Clk,
stacks: OptionalClk,
coregroup: OptionalClk,
}
impl Drop for Clocks {
fn drop(&mut self) {
self.core.disable_unprepare();
self.stacks.disable_unprepare();
self.coregroup.disable_unprepare();
}
}
struct Regulators {
_mali: Regulator<regulator::Enabled>,
_sram: Regulator<regulator::Enabled>,
}
Annotation
- Detected declarations: `struct Clocks`, `struct Regulators`, `function Ok`, `function drop`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.