drivers/gpu/drm/v3d/v3d_debugfs.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/v3d/v3d_debugfs.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/v3d/v3d_debugfs.c- Extension
.c- Size
- 9796 bytes
- Lines
- 310
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/circ_buf.hlinux/ctype.hlinux/debugfs.hlinux/seq_file.hlinux/string_helpers.hdrm/drm_debugfs.hdrm/drm_print.hv3d_drv.hv3d_regs.h
Detected Declarations
struct v3d_reg_deffunction v3d_v3d_debugfs_regsfunction v3d_v3d_debugfs_identfunction v3d_debugfs_bo_statsfunction v3d_measure_clockfunction v3d_debugfs_mmfunction v3d_debugfs_init
Annotated Snippet
struct v3d_reg_def {
u32 min_ver;
u32 max_ver;
u32 reg;
const char *name;
};
static const struct v3d_reg_def v3d_hub_reg_defs[] = {
REGDEF(V3D_GEN_33, V3D_GEN_42, V3D_HUB_AXICFG),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_UIFCFG),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_IDENT0),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_IDENT1),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_IDENT2),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_IDENT3),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_INT_STS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_HUB_INT_MSK_STS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_MMU_CTL),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_MMU_VIO_ADDR),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_MMU_VIO_ID),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_MMU_DEBUG_INFO),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_GMP_STATUS(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_GMP_CFG(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_GMP_VIO_ADDR(71)),
};
static const struct v3d_reg_def v3d_gca_reg_defs[] = {
REGDEF(V3D_GEN_33, V3D_GEN_33, V3D_GCA_SAFE_SHUTDOWN),
REGDEF(V3D_GEN_33, V3D_GEN_33, V3D_GCA_SAFE_SHUTDOWN_ACK),
};
static const struct v3d_reg_def v3d_core_reg_defs[] = {
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_IDENT0),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_IDENT1),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_IDENT2),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_MISCCFG),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_INT_STS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CTL_INT_MSK_STS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT0CS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT0CA),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT0EA),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT1CS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT1CA),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_CLE_CT1EA),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_PTB_BPCA),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_PTB_BPCS),
REGDEF(V3D_GEN_33, V3D_GEN_42, V3D_GMP_STATUS(33)),
REGDEF(V3D_GEN_33, V3D_GEN_42, V3D_GMP_CFG(33)),
REGDEF(V3D_GEN_33, V3D_GEN_42, V3D_GMP_VIO_ADDR(33)),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_ERR_FDBGO),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_ERR_FDBGB),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_ERR_FDBGS),
REGDEF(V3D_GEN_33, V3D_GEN_71, V3D_ERR_STAT),
};
static const struct v3d_reg_def v3d_csd_reg_defs[] = {
REGDEF(V3D_GEN_41, V3D_GEN_71, V3D_CSD_STATUS),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG0(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG1(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG2(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG3(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG4(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG5(41)),
REGDEF(V3D_GEN_41, V3D_GEN_42, V3D_CSD_CURRENT_CFG6(41)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG0(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG1(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG2(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG3(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG4(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG5(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_CSD_CURRENT_CFG6(71)),
REGDEF(V3D_GEN_71, V3D_GEN_71, V3D_V7_CSD_CURRENT_CFG7),
};
static int v3d_v3d_debugfs_regs(struct seq_file *m, void *unused)
{
struct drm_debugfs_entry *entry = m->private;
struct drm_device *dev = entry->dev;
struct v3d_dev *v3d = to_v3d_dev(dev);
int i, core, ret;
ret = v3d_pm_runtime_get(v3d);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(v3d_hub_reg_defs); i++) {
Annotation
- Immediate include surface: `linux/circ_buf.h`, `linux/ctype.h`, `linux/debugfs.h`, `linux/seq_file.h`, `linux/string_helpers.h`, `drm/drm_debugfs.h`, `drm/drm_print.h`, `v3d_drv.h`.
- Detected declarations: `struct v3d_reg_def`, `function v3d_v3d_debugfs_regs`, `function v3d_v3d_debugfs_ident`, `function v3d_debugfs_bo_stats`, `function v3d_measure_clock`, `function v3d_debugfs_mm`, `function v3d_debugfs_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.