drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c- Extension
.c- Size
- 35188 bytes
- Lines
- 1141
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_atomic_state_helper.hdrm/drm_atomic_uapi.hdrm/drm_crtc.hdrm/drm_drv.hdrm/drm_fourcc.hdrm/drm_kunit_helpers.hdrm/drm_mode.hdrm/drm_modeset_helper_vtables.hdrm/drm_plane.hkunit/test.h../vc4_drv.hvc4_mock.h
Detected Declarations
struct pv_muxing_privstruct encoder_constraintstruct pv_muxing_paramfunction check_fifo_conflictfunction check_vc4_encoder_constraintsfunction check_vc5_encoder_constraintsfunction get_vc4_crtc_state_for_encoderfunction check_channel_for_encoderfunction vc4_test_pv_muxing_descfunction drm_vc4_test_pv_muxingfunction drm_vc4_test_pv_muxing_invalidfunction vc4_pv_muxing_test_initfunction drm_test_vc5_pv_muxing_bugs_subsequent_crtc_enablefunction drm_test_vc5_pv_muxing_bugs_stable_fifofunction drm_test_vc5_pv_muxing_bugs_stable_fifo
Annotated Snippet
struct pv_muxing_priv {
struct vc4_dev *vc4;
};
static bool check_fifo_conflict(struct kunit *test,
const struct drm_atomic_commit *state)
{
struct vc4_hvs_state *hvs_state;
unsigned int used_fifos = 0;
unsigned int i;
hvs_state = vc4_hvs_get_new_global_state(state);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, hvs_state);
for (i = 0; i < HVS_NUM_CHANNELS; i++) {
if (!hvs_state->fifo_state[i].in_use)
continue;
KUNIT_EXPECT_FALSE(test, used_fifos & BIT(i));
used_fifos |= BIT(i);
}
return true;
}
struct encoder_constraint {
enum vc4_encoder_type type;
unsigned int *channels;
size_t nchannels;
};
#define ENCODER_CONSTRAINT(_type, ...) \
{ \
.type = _type, \
.channels = (unsigned int[]) { __VA_ARGS__ }, \
.nchannels = sizeof((unsigned int[]) { __VA_ARGS__ }) / \
sizeof(unsigned int), \
}
static bool __check_encoder_constraints(const struct encoder_constraint *constraints,
size_t nconstraints,
enum vc4_encoder_type type,
unsigned int channel)
{
unsigned int i;
for (i = 0; i < nconstraints; i++) {
const struct encoder_constraint *constraint = &constraints[i];
unsigned int j;
if (constraint->type != type)
continue;
for (j = 0; j < constraint->nchannels; j++) {
unsigned int _channel = constraint->channels[j];
if (channel != _channel)
continue;
return true;
}
}
return false;
}
static const struct encoder_constraint vc4_encoder_constraints[] = {
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DPI, 0),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 1),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 2),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 2),
};
static const struct encoder_constraint vc5_encoder_constraints[] = {
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DPI, 0),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 0, 2),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 0, 1, 2),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 0, 1, 2),
ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI1, 0, 1, 2),
};
static bool check_vc4_encoder_constraints(enum vc4_encoder_type type, unsigned int channel)
{
return __check_encoder_constraints(vc4_encoder_constraints,
ARRAY_SIZE(vc4_encoder_constraints),
type, channel);
Annotation
- Immediate include surface: `drm/drm_atomic.h`, `drm/drm_atomic_helper.h`, `drm/drm_atomic_state_helper.h`, `drm/drm_atomic_uapi.h`, `drm/drm_crtc.h`, `drm/drm_drv.h`, `drm/drm_fourcc.h`, `drm/drm_kunit_helpers.h`.
- Detected declarations: `struct pv_muxing_priv`, `struct encoder_constraint`, `struct pv_muxing_param`, `function check_fifo_conflict`, `function check_vc4_encoder_constraints`, `function check_vc5_encoder_constraints`, `function get_vc4_crtc_state_for_encoder`, `function check_channel_for_encoder`, `function vc4_test_pv_muxing_desc`, `function drm_vc4_test_pv_muxing`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.