drivers/gpu/drm/vc4/vc4_hdmi_phy.c

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

Extension

.c

Size

38387 bytes

Lines

1201

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• vc4_hdmi.h
• vc4_regs.h
• vc4_hdmi_regs.h

Detected Declarations

• struct phy_lane_settings
• struct phy_settings
• struct vc6_phy_lane_settings
• struct vc6_phy_settings
• function Copyright
• function vc4_hdmi_phy_disable
• function vc4_hdmi_phy_rng_enable
• function vc4_hdmi_phy_rng_disable
• function phy_get_vco_freq
• function phy_get_cp_current
• function phy_get_rm_offset
• function phy_get_vco_gain
• function phy_get_channel_settings
• function vc5_hdmi_reset_phy
• function vc5_hdmi_phy_init
• function vc5_hdmi_phy_disable
• function vc5_hdmi_phy_rng_enable
• function vc5_hdmi_phy_rng_disable
• function vc6_phy_get_vco_freq
• function vc6_phy_get_settings
• function vc6_phy_get_channel_settings
• function vc6_hdmi_reset_phy
• function vc6_hdmi_phy_init
• function vc6_hdmi_phy_disable

Annotated Snippet

struct phy_lane_settings {
	struct {
		u8 preemphasis;
		u8 main_driver;
	} amplitude;

	u8 res_sel_data;
	u8 term_res_sel_data;
};

struct phy_settings {
	unsigned long long min_rate;
	unsigned long long max_rate;
	struct phy_lane_settings channel[3];
	struct phy_lane_settings clock;
};

static const struct phy_settings vc5_hdmi_phy_settings[] = {
	{
		0, 50000000,
		{
			{{0x0, 0x0A}, 0x12, 0x0},
			{{0x0, 0x0A}, 0x12, 0x0},
			{{0x0, 0x0A}, 0x12, 0x0}
		},
		{{0x0, 0x0A}, 0x18, 0x0},
	},
	{
		50000001, 75000000,
		{
			{{0x0, 0x09}, 0x12, 0x0},
			{{0x0, 0x09}, 0x12, 0x0},
			{{0x0, 0x09}, 0x12, 0x0}
		},
		{{0x0, 0x0C}, 0x18, 0x3},
	},
	{
		75000001,   165000000,
		{
			{{0x0, 0x09}, 0x12, 0x0},
			{{0x0, 0x09}, 0x12, 0x0},
			{{0x0, 0x09}, 0x12, 0x0}
		},
		{{0x0, 0x0C}, 0x18, 0x3},
	},
	{
		165000001,  250000000,
		{
			{{0x0, 0x0F}, 0x12, 0x1},
			{{0x0, 0x0F}, 0x12, 0x1},
			{{0x0, 0x0F}, 0x12, 0x1}
		},
		{{0x0, 0x0C}, 0x18, 0x3},
	},
	{
		250000001,  340000000,
		{
			{{0x2, 0x0D}, 0x12, 0x1},
			{{0x2, 0x0D}, 0x12, 0x1},
			{{0x2, 0x0D}, 0x12, 0x1}
		},
		{{0x0, 0x0C}, 0x18, 0xF},
	},
	{
		340000001,  450000000,
		{
			{{0x0, 0x1B}, 0x12, 0xF},
			{{0x0, 0x1B}, 0x12, 0xF},
			{{0x0, 0x1B}, 0x12, 0xF}
		},
		{{0x0, 0x0A}, 0x12, 0xF},
	},
	{
		450000001,  600000000,
		{
			{{0x0, 0x1C}, 0x12, 0xF},
			{{0x0, 0x1C}, 0x12, 0xF},
			{{0x0, 0x1C}, 0x12, 0xF}
		},
		{{0x0, 0x0B}, 0x13, 0xF},
	},
};

static const struct phy_settings *phy_get_settings(unsigned long long tmds_rate)
{
	unsigned int count = ARRAY_SIZE(vc5_hdmi_phy_settings);
	unsigned int i;

	for (i = 0; i < count; i++) {
		const struct phy_settings *s = &vc5_hdmi_phy_settings[i];

Annotation

• Immediate include surface: `vc4_hdmi.h`, `vc4_regs.h`, `vc4_hdmi_regs.h`.
• Detected declarations: `struct phy_lane_settings`, `struct phy_settings`, `struct vc6_phy_lane_settings`, `struct vc6_phy_settings`, `function Copyright`, `function vc4_hdmi_phy_disable`, `function vc4_hdmi_phy_rng_enable`, `function vc4_hdmi_phy_rng_disable`, `function phy_get_vco_freq`, `function phy_get_cp_current`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.