drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c- Extension
.c- Size
- 9948 bytes
- Lines
- 371
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/sched/signal.hvmwgfx_drv.h
Detected Declarations
function filesfunction vmw_thread_fnfunction vmw_irq_handlerfunction vmw_fifo_idlefunction vmw_seqno_passedfunction vmw_fallback_waitfunction vmw_generic_waiter_addfunction vmw_generic_waiter_removefunction vmw_seqno_waiter_addfunction vmw_seqno_waiter_removefunction vmw_goal_waiter_addfunction vmw_goal_waiter_removefunction vmw_irq_preinstallfunction vmw_irq_uninstallfunction vmw_irq_install
Annotated Snippet
if (dev_priv->cman) {
ret = vmw_cmdbuf_idle(dev_priv->cman, interruptible,
10*HZ);
if (ret)
goto out_err;
} else if (fifo_state) {
down_read(&fifo_state->rwsem);
fifo_down = true;
}
}
signal_seq = atomic_read(&dev_priv->marker_seq);
ret = 0;
for (;;) {
prepare_to_wait(&dev_priv->fence_queue, &__wait,
(interruptible) ?
TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
if (wait_condition(dev_priv, seqno))
break;
if (time_after_eq(jiffies, end_jiffies)) {
DRM_ERROR("SVGA device lockup.\n");
break;
}
if (lazy)
schedule_timeout(1);
else if ((++count & 0x0F) == 0) {
/**
* FIXME: Use schedule_hr_timeout here for
* newer kernels and lower CPU utilization.
*/
__set_current_state(TASK_RUNNING);
schedule();
__set_current_state((interruptible) ?
TASK_INTERRUPTIBLE :
TASK_UNINTERRUPTIBLE);
}
if (interruptible && signal_pending(current)) {
ret = -ERESTARTSYS;
break;
}
}
finish_wait(&dev_priv->fence_queue, &__wait);
if (ret == 0 && fifo_idle && fifo_state)
vmw_fence_write(dev_priv, signal_seq);
wake_up_all(&dev_priv->fence_queue);
out_err:
if (fifo_down)
up_read(&fifo_state->rwsem);
return ret;
}
bool vmw_generic_waiter_add(struct vmw_private *dev_priv,
u32 flag, int *waiter_count)
{
bool hw_programmed = false;
spin_lock(&dev_priv->waiter_lock);
if ((*waiter_count)++ == 0) {
vmw_irq_status_write(dev_priv, flag);
dev_priv->irq_mask |= flag;
vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
hw_programmed = true;
}
spin_unlock(&dev_priv->waiter_lock);
return hw_programmed;
}
bool vmw_generic_waiter_remove(struct vmw_private *dev_priv,
u32 flag, int *waiter_count)
{
bool hw_programmed = false;
spin_lock(&dev_priv->waiter_lock);
if (--(*waiter_count) == 0) {
dev_priv->irq_mask &= ~flag;
vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
hw_programmed = true;
}
spin_unlock(&dev_priv->waiter_lock);
return hw_programmed;
}
bool vmw_seqno_waiter_add(struct vmw_private *dev_priv)
{
return vmw_generic_waiter_add(dev_priv, SVGA_IRQFLAG_ANY_FENCE,
&dev_priv->fence_queue_waiters);
Annotation
- Immediate include surface: `linux/pci.h`, `linux/sched/signal.h`, `vmwgfx_drv.h`.
- Detected declarations: `function files`, `function vmw_thread_fn`, `function vmw_irq_handler`, `function vmw_fifo_idle`, `function vmw_seqno_passed`, `function vmw_fallback_wait`, `function vmw_generic_waiter_add`, `function vmw_generic_waiter_remove`, `function vmw_seqno_waiter_add`, `function vmw_seqno_waiter_remove`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.