drivers/gpu/drm/xe/tests/xe_mocs.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/xe/tests/xe_mocs.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/xe/tests/xe_mocs.c
Extension
.c
Size
4831 bytes
Lines
194
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct live_mocs {
	struct xe_mocs_info table;
};

static int live_mocs_init(struct live_mocs *arg, struct xe_gt *gt)
{
	unsigned int flags;
	struct kunit *test = kunit_get_current_test();

	memset(arg, 0, sizeof(*arg));

	flags = get_mocs_settings(gt_to_xe(gt), &arg->table);

	kunit_info(test, "gt %d", gt->info.id);
	kunit_info(test, "gt type %d", gt->info.type);
	kunit_info(test, "table size %d", arg->table.table_size);
	kunit_info(test, "table uc_index %d", arg->table.uc_index);
	kunit_info(test, "table num_mocs_regs %d", arg->table.num_mocs_regs);

	return flags;
}

static void read_l3cc_table(struct xe_gt *gt,
			    const struct xe_mocs_info *info)
{
	struct kunit *test = kunit_get_current_test();
	u32 l3cc, l3cc_expected;
	unsigned int i;
	u32 reg_val;

	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
	if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL))
		KUNIT_FAIL_AND_ABORT(test, "Forcewake Failed.\n");

	for (i = 0; i < info->num_mocs_regs; i++) {
		if (!(i & 1)) {
			if (regs_are_mcr(gt))
				reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i >> 1));
			else
				reg_val = xe_mmio_read32(&gt->mmio, XELP_LNCFCMOCS(i >> 1));

			mocs_dbg(gt, "reg_val=0x%x\n", reg_val);
		} else {
			/* Just reuse value read on previous iteration */
			reg_val >>= 16;
		}

		l3cc_expected = get_entry_l3cc(info, i);
		l3cc = reg_val & 0xffff;

		mocs_dbg(gt, "[%u] expected=0x%x actual=0x%x\n",
			 i, l3cc_expected, l3cc);

		KUNIT_EXPECT_EQ_MSG(test, l3cc_expected, l3cc,
				    "l3cc idx=%u has incorrect val.\n", i);
	}
}

static void read_mocs_table(struct xe_gt *gt,
			    const struct xe_mocs_info *info)
{
	struct kunit *test = kunit_get_current_test();
	u32 mocs, mocs_expected;
	unsigned int i;
	u32 reg_val;

	KUNIT_EXPECT_TRUE_MSG(test, info->unused_entries_index,
			      "Unused entries index should have been defined\n");

	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
	KUNIT_ASSERT_NE_MSG(test, fw_ref.domains, 0, "Forcewake Failed.\n");

	for (i = 0; i < info->num_mocs_regs; i++) {
		if (regs_are_mcr(gt))
			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
		else
			reg_val = xe_mmio_read32(&gt->mmio, XELP_GLOBAL_MOCS(i));

		mocs_expected = get_entry_control(info, i);
		mocs = reg_val;

		mocs_dbg(gt, "[%u] expected=0x%x actual=0x%x\n",
			 i, mocs_expected, mocs);

		KUNIT_EXPECT_EQ_MSG(test, mocs_expected, mocs,
				    "mocs reg 0x%x has incorrect val.\n", i);
	}
}

static int mocs_kernel_test_run_device(struct xe_device *xe)

Annotation

Implementation Notes